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Add some P64H2-specific definitions, remove some generic PCI ones. 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2034 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Steven J. Magnani 2005-09-14 13:55:41 +00:00
parent af0cf12eff
commit eb065f0620
1 changed files with 7 additions and 2 deletions
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9
src/southbridge/intel/i82870/82870.h
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@ -1,6 +1,4 @@
/* for io apic 1461 */ /* for io apic 1461 */
#define PCICMD 0x04
#define SUBSYS 0x2c
#define MBAR 0x10 #define MBAR 0x10
#define ABAR 0x40 #define ABAR 0x40
@ -8,3 +6,10 @@
#define MTT 0x042 #define MTT 0x042
#define HCCR 0x0f0 #define HCCR 0x0f0
#define ACNF 0x0e0 #define ACNF 0x0e0
#define STRP 0x44 // Strap status register
#define STRP_EN133 0x0001 // 133 MHz-capable (Px_133EN)
#define STRP_HPCAP 0x0002 // Hot-plug capable (Hx_SLOT zero/nonzero)
#define ACNF_SYNCPH 0x0010 // PCI(-X) input clock is synchronous to hub input clock