GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

This adds register map based on NSC PC87392 datasheet. LDN#2 can be 

used for a SIR/FIR device.

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Ulf Jordan <jordan@chalmers.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3827 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Michał Mirosław 2008-12-20 19:35:54 +00:00 committed by Corey Osgood
parent 48994e1633
commit eb390abb4e
1 changed files with 36 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
util/superiotool/nsc.c
View File

@ -308,6 +308,42 @@ static const struct superio_registers reg_table[] = {
/* SID[7..0]: family, SRID[7..5]: ID, SRID[4..0]: rev. */
{0xea, "PC8739x", {
{NOLDN, NULL,
{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,
0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{0xea,0x11,MISC,MISC,MISC,0x80,0x00,NANA,0x00,MISC,
0x37,RSVD,RSVD,RSVD,RSVD,RSVD,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
{0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,EOT}},
{0x1, "Parallel port",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
{0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,EOT}},
{0x2, "COM2 / FIR",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
{0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
{0x3, "COM1",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
{0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
{0x7, "GPIO",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,
EOT},
{0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,0x44,0x01,
EOT}},
{0xa, "Watchdog timer (WDT)",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x02,EOT}},
{0xb, "Game port",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
{0x00,0x02,0x01,0x00,0x03,0x04,0x04,0x00,EOT}},
{0xc, "MIDI port",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
{0x00,0x03,0x30,0x00,0x03,0x04,0x04,0x00,EOT}},
{0xf, "X-Bus",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,
0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,EOT},
{0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{EOT}}},
{0xec, "PC87591x", {
/* SRID[7..5]: 000=PC87591E, 001=PC87591S, 100=PC87591L */