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mb/*: Use common IPMI KCS driver 

Remove duplicated code and instead use the IPMI KCS driver, which provides
the same functionality.

Change-Id: I419713c9bef02084cca1ff4cf11c33c2e3e8d3c1
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33490
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Andrey Petrov <anpetrov@fb.com>
This commit is contained in:
Patrick Rudolph 2019-06-15 11:01:16 +02:00 committed by Patrick Rudolph
parent a96c4a1340
commit eb50d9a4fe
7 changed files with 4 additions and 174 deletions
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1
src/mainboard/asus/kgpe-d16/Kconfig
View File

@ -32,6 +32,7 @@ config BOARD_SPECIFIC_OPTIONS
select DRIVERS_ASPEED_AST2050
select MAINBOARD_FORCE_NATIVE_VGA_INIT
select POWER_STATE_DEFAULT_ON_AFTER_FAILURE
select IPMI_KCS
config MAINBOARD_DIR
string

2
src/mainboard/asus/kgpe-d16/devicetree.cb
View File

@ -217,7 +217,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex
chip drivers/pc80/tpm
device pnp 4e.0 on end # TPM module
end
chip drivers/generic/generic # BMC KCS
chip drivers/ipmi # BMC KCS
device pnp ca2.0 on end
end
end

31
src/mainboard/asus/kgpe-d16/dsdt.asl
View File

@ -53,9 +53,6 @@ DefinitionBlock (
#include <southbridge/amd/common/acpi/sleepstates.asl>
/* IPMI KCS enable */
Name (KCSE, 0x1)
/* The _PIC method is called by the OS to choose between interrupt
* routing via the i8259 interrupt controller or the APIC.
*
@ -489,13 +486,6 @@ DefinitionBlock (
Name (_HID, EisaId ("PNP0A05"))
Name (_ADR, 0x00140003)
OperationRegion (BMRG, SystemIO, 0xca2, 0x02) /* BMC KCS registers */
Field (BMRG, AnyAcc, NoLock, Preserve)
{
BMRI, 8, /* Index */
BMRD, 8, /* Data */
}
/* Real Time Clock Device */
Device(RTC0) {
Name(_HID, EISAID("PNP0B00")) /* AT Real Time Clock (not PIIX4 compatible) */
@ -617,27 +607,6 @@ DefinitionBlock (
})
}
}
Device (KCS1) { /* IPMI KCS */
Name (_HID, EISAID ("IPI0001")) /* ASpeed BMC */
Method (_STA, 0, NotSerialized) {
If (KCSE) { /* Detection enabled */
If (LNotEqual (BMRD, 0xff)) {
Return (0x0f) /* Device present */
}
Return (Zero)
}
Return (Zero)
}
Method (_CRS, 0) {
Return (ResourceTemplate() {
IO(Decode16, 0x0ca2, 0x0ca2, 0x01, 0x02)
})
}
Method (_IFT, 0, NotSerialized) { /* Interface type */
Return (One) /* KCS interface */
}
}
}
/* High Precision Event Timer */

8
src/mainboard/asus/kgpe-d16/mainboard.c
View File

@ -47,7 +47,6 @@ void set_pcie_dereset(void)
* enable the dedicated function in kgpe-d16 board.
* This function is called earlier than sr5650_enable.
*************************************************/
#define BMC_KCS_BASE 0xca2
static void mainboard_enable(struct device *dev)
{
@ -69,13 +68,6 @@ static void mainboard_enable(struct device *dev)
set_pcie_dereset();
/* get_ide_dma66(); */
/* Enable access to the BMC IPMI via KCS */
struct device *lpc_sio_dev = dev_find_slot_pnp(BMC_KCS_BASE, 0);
struct resource *res = new_resource(lpc_sio_dev, BMC_KCS_BASE);
res->base = BMC_KCS_BASE;
res->size = 1;
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
/* override the default SATA PHY setup */

3
src/mainboard/ocp/monolake/devicetree.cb
View File

@ -11,8 +11,9 @@ chip soc/intel/fsp_broadwell_de
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
chip drivers/generic/generic # BMC KCS
chip drivers/ipmi # BMC KCS
device pnp ca2.0 on end
register "bmc_i2c_address" = "0x20"
end
end # LPC Bridge
device pci 1f.2 on end # SATA Controller

95
src/mainboard/ocp/monolake/dsdt.asl
View File

@ -27,9 +27,6 @@ DefinitionBlock(
{
#include "acpi/platform.asl"
Name (IDTP, 0x0CA2)
Name (ICDP, 0x0CA6)
Name(_S0, Package() { 0x00, 0x00, 0x00, 0x00 })
Name(_S5, Package() { 0x07, 0x00, 0x00, 0x00 })
@ -293,97 +290,5 @@ DefinitionBlock(
}
}
Scope (_SB.PCI0.LPC0)
{
Device (SPMI)
{
Name (_HID, EisaId ("IPI0001"))
Name (_STR, Unicode ("IPMI_KCS"))
Name (_UID, 0x00)
OperationRegion (IPST, SystemIO, ICDP, 0x01)
Field (IPST, ByteAcc, NoLock, Preserve)
{
STAS, 8
}
Method (_STA, 0, NotSerialized) {
Return (0x0f)
}
Name (ICRS, ResourceTemplate ()
{
IO (Decode16,
0x0000,
0x0000,
0x00,
0x00,
_Y01)
IO (Decode16,
0x0000,
0x0000,
0x00,
0x00,
_Y02)
})
Method (_CRS, 0, NotSerialized)
{
CreateWordField (ICRS, \_SB.PCI0.LPC0.SPMI._Y01._MIN, IPDB)
CreateWordField (ICRS, \_SB.PCI0.LPC0.SPMI._Y01._MAX, IPDH)
CreateByteField (ICRS, \_SB.PCI0.LPC0.SPMI._Y01._LEN, IPDL)
CreateWordField (ICRS, \_SB.PCI0.LPC0.SPMI._Y02._MIN, IPCB)
CreateWordField (ICRS, \_SB.PCI0.LPC0.SPMI._Y02._MAX, IPCH)
CreateByteField (ICRS, \_SB.PCI0.LPC0.SPMI._Y02._LEN, IPCL)
IPDB = IDTP
IPDH = IDTP
IPDL = 0x01
IPCB = ICDP
IPCH = ICDP
IPCL = 0x01
Return (ICRS)
}
Method (_IFT, 0, NotSerialized) {
Return (0x01)
}
Method(_SRV, 0, NotSerialized) {
Return (0x0200)
}
}
Device (SYSR)
{
Name (_HID, EisaId ("PNP0C02"))
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0CA2,
0x0CA2,
0x01,
0x01,
)
IO (Decode16,
0x0CA6,
0x0CA6,
0x01,
0x01,
)
IO (Decode16,
0x0CA8,
0x0CA8,
0x01,
0x01,
)
IO (Decode16,
0x0CAC,
0x0CAC,
0x01,
0x01,
)
})
}
}
#include "acpi/mainboard.asl"
}

38
src/mainboard/ocp/monolake/mainboard.c
View File

@ -15,55 +15,17 @@
*/
#include <device/device.h>
#include <smbios.h>
#if CONFIG(VGA_ROM_RUN)
#include <x86emu/x86emu.h>
#endif
#include <pc80/mc146818rtc.h>
#include <cf9_reset.h>
#include "ipmi.h"
#define BMC_KCS_BASE 0xca2
#define INTERFACE_IS_IO 0x1
#if CONFIG(GENERATE_SMBIOS_TABLES)
static int mainboard_smbios_data(struct device *dev, int *handle,
unsigned long *current)
{
int len = 0;
// add IPMI Device Information
len += smbios_write_type38(
current, handle,
SMBIOS_BMC_INTERFACE_KCS,
0x20, // IPMI Version
0x20, // I2C address
0xff, // no NV storage
BMC_KCS_BASE | INTERFACE_IS_IO, // IO port interface address
0x40,
0); // no IRQ
return len;
}
#endif
/*
* mainboard_enable is executed as first thing after enumerate_buses().
* This is the earliest point to add customization.
*/
static void mainboard_enable(struct device *dev)
{
#if CONFIG(GENERATE_SMBIOS_TABLES)
dev->ops->get_smbios_data = mainboard_smbios_data;
#endif
/* Enable access to the BMC IPMI via KCS */
struct device *lpc_sio_dev = dev_find_slot_pnp(BMC_KCS_BASE, 0);
struct resource *res = new_resource(lpc_sio_dev, BMC_KCS_BASE);
ipmi_oem_rsp_t rsp;
res->base = BMC_KCS_BASE;
res->size = 1;
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
if (is_ipmi_clear_cmos_set(&rsp)) {
/* TODO: Should also try to restore CMOS to cmos.default