From eb644113057cc4f64cb42f897486fffc9c6ff27e Mon Sep 17 00:00:00 2001
From: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Date: Fri, 3 Sep 2021 14:21:31 +0800
Subject: [PATCH] mb/google/brya/variants/gimble: Enable SaGv support

This patch enables SaGv support for gimble.

BUG=b:198531517
TEST=USE="project_gimble emerge-brya coreboot" and verify it builds
without error.

Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: I29887418827614afb10558c6958c9c5e9667079e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57357
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Marx Wang <marx.wang@intel.com>
---
 src/mainboard/google/brya/variants/gimble/overridetree.cb | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mainboard/google/brya/variants/gimble/overridetree.cb b/src/mainboard/google/brya/variants/gimble/overridetree.cb
index 55ff5e53d1..bb0a7ff269 100644
--- a/src/mainboard/google/brya/variants/gimble/overridetree.cb
+++ b/src/mainboard/google/brya/variants/gimble/overridetree.cb
@@ -20,6 +20,7 @@ fw_config
 	end
 end
 chip soc/intel/alderlake
+	register "SaGv" = "SaGv_Enabled"
 	register "TcssAuxOri" = "1"
 	register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
 	register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable USB2_C2