diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c
index 5b62c069da..f6e1d24725 100644
--- a/src/soc/intel/meteorlake/chip.c
+++ b/src/soc/intel/meteorlake/chip.c
@@ -8,16 +8,20 @@
 #include <intelblocks/cfg.h>
 #include <intelblocks/gpio.h>
 #include <intelblocks/itss.h>
+#include <intelblocks/p2sb.h>
 #include <intelblocks/pcie_rp.h>
 #include <intelblocks/systemagent.h>
+#include <intelblocks/tcss.h>
 #include <intelblocks/xdci.h>
 #include <soc/intel/common/vbt.h>
+#include <soc/iomap.h>
 #include <soc/itss.h>
 #include <soc/p2sb.h>
 #include <soc/pci_devs.h>
 #include <soc/pcie.h>
 #include <soc/ramstage.h>
 #include <soc/soc_chip.h>
+#include <soc/tcss.h>
 
 #if CONFIG(HAVE_ACPI_TABLES)
 const char *soc_acpi_name(const struct device *dev)
@@ -129,6 +133,12 @@ static void soc_fill_gpio_pm_configuration(void)
 
 void soc_init_pre_device(void *chip_info)
 {
+	config_t *config = config_of_soc();
+
+	/* Validate TBT image authentication */
+	config->tbt_authentication = ioe_p2sb_sbi_read(PID_IOM,
+					IOM_CSME_IMR_TBT_STATUS) & TBT_VALID_AUTHENTICATION;
+
 	/* Perform silicon specific init. */
 	fsp_silicon_init();
 
diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h
index 05d77f3d1c..04b8299b2d 100644
--- a/src/soc/intel/meteorlake/chip.h
+++ b/src/soc/intel/meteorlake/chip.h
@@ -126,6 +126,8 @@ struct soc_intel_meteorlake_config {
 	/* Program OC pins for TCSS */
 	struct tcss_port_config tcss_ports[MAX_TYPE_C_PORTS];
 	uint8_t tbt_pcie_port_disable[4];
+	/* Validate TBT firmware authenticated and loaded into IMR */
+	bool tbt_authentication;
 
 	/* SATA related */
 	uint8_t sata_mode;
diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c
index 3ca6c52da6..ff17a35a36 100644
--- a/src/soc/intel/meteorlake/fsp_params.c
+++ b/src/soc/intel/meteorlake/fsp_params.c
@@ -14,8 +14,8 @@
 #include <intelblocks/lpss.h>
 #include <intelblocks/xdci.h>
 #include <intelpch/lockdown.h>
-#include <intelblocks/tcss.h>
 #include <security/vboot/vboot_common.h>
+#include <soc/cpu.h>
 #include <soc/gpio_soc_defs.h>
 #include <soc/intel/common/vbt.h>
 #include <soc/pci_devs.h>
@@ -23,7 +23,6 @@
 #include <soc/ramstage.h>
 #include <soc/soc_chip.h>
 #include <soc/soc_info.h>
-#include <soc/cpu.h>
 #include <string.h>
 
 /* THC assignment definition */
diff --git a/src/soc/intel/meteorlake/tcss.c b/src/soc/intel/meteorlake/tcss.c
index c51fe6c41f..7509504eea 100644
--- a/src/soc/intel/meteorlake/tcss.c
+++ b/src/soc/intel/meteorlake/tcss.c
@@ -1,8 +1,15 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <intelblocks/tcss.h>
+#include <soc/soc_chip.h>
 
 const struct soc_tcss_ops tcss_ops = {
-	.configure_aux_bias_pads = tcss_configure_aux_bias_pads_regbar,
-	.valid_tbt_auth = tcss_valid_tbt_auth,
+	.configure_aux_bias_pads = ioe_tcss_configure_aux_bias_pads_sbi,
+	.valid_tbt_auth = ioe_tcss_valid_tbt_auth,
 };
+
+bool ioe_tcss_valid_tbt_auth(void)
+{
+	const config_t *config = config_of_soc();
+	return config->tbt_authentication;
+}