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Fix Geode GX2 + LX caching for tiny bootblock. 

Change-Id: If681a33deb7df752b37c6a8a20482d3c374af936
Signed-off-by: Nils Jacobs <njacobs8@adsltotaal.nl>
Reviewed-on: http://review.coreboot.org/528
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Philip Prindeville <philipp@redfish-solutions.com>
This commit is contained in:
Nils Jacobs 2012-01-09 20:27:07 +01:00 committed by Peter Stuge
parent 8d846135ff
commit eb84f6a978
1 changed files with 2 additions and 2 deletions
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4
src/cpu/amd/model_lx/msrinit.c
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@ -22,10 +22,10 @@
static const msrinit_t msr_table[] = static const msrinit_t msr_table[] =
{ {
{CPU_RCONF_DEFAULT, {.hi = 0x24fffc02,.lo = 0x1000A000}}, /* Setup access to cache under 1MB. {CPU_RCONF_DEFAULT, {.hi = 0x24fffc00,.lo = 0x0000A000}}, /* Setup access to cache under 1MB.
* Rom Properties: Write Serialize, WriteProtect. * Rom Properties: Write Serialize, WriteProtect.
* RomBase: 0xFFFC0 * RomBase: 0xFFFC0
* SysTop to RomBase Properties: Write Serialize, Cache Disable. * SysTop to RomBase Properties: Write Back.
* SysTop: 0x000A0 * SysTop: 0x000A0
* System Memory Properties: (Write Back) */ * System Memory Properties: (Write Back) */
{CPU_RCONF_A0_BF, {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xA0000-0xBFFFF : (Write Back) */ {CPU_RCONF_A0_BF, {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xA0000-0xBFFFF : (Write Back) */