nb/intel/haswell: Use 16-bit ops on PCI COMMAND

The PCI COMMAND register is 16 bits wide. So, do not use 32-bit PCI ops
to update it.

Change-Id: I8f8d9e978f3b241cb544dd1d26e0f5fa8997d11e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

src/northbridge/intel/haswell/minihd.c

@@ -59,7 +59,7 @@ static void minihd_init(struct device *dev)
 	printk(BIOS_DEBUG, "Mini-HD: base = %p\n", base);
 
 	/* Set Bus Master */
-	pci_or_config32(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
+	pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
 
 	/* Mini-HD configuration */
 	reg32 = read32(base + 0x100c);