From eb89ca67ef30dc9c36821081503be98c73781e8d Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Sat, 13 Feb 2021 01:48:53 +0100
Subject: [PATCH] soc/amd/cezanne/include/iomap: add HPET base address

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I72559147a3f86f0cb843b74af9b148d23229ff14
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50623
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/amd/cezanne/include/soc/iomap.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/soc/amd/cezanne/include/soc/iomap.h b/src/soc/amd/cezanne/include/soc/iomap.h
index 73640f5ab9..0d59c2c47c 100644
--- a/src/soc/amd/cezanne/include/soc/iomap.h
+++ b/src/soc/amd/cezanne/include/soc/iomap.h
@@ -5,6 +5,12 @@
 
 /* MMIO Ranges */
 #define SPI_BASE_ADDRESS		0xfec10000
+
+#if CONFIG(HPET_ADDRESS_OVERRIDE)
+#error HPET address override is not allowed and must be fixed at 0xfed00000
+#endif
+#define HPET_BASE_ADDRESS		0xfed00000
+
 /* FCH AL2AHB Registers */
 #define ALINK_AHB_ADDRESS		0xfedc0000