AMD bettong: Fix the interrupt routing.
The plugged devices on PCIe should use IOAPIC2 instead of standard IOAPIC1. The entries in IOAPIC2 count from the end of IOAPIC1. The unchanged code worked because the OS uses MSI instead APIC. To test that, boot linux with parameter pci=nomsi and see if the devices like NIC work well as they do without the booting parameter. Change-Id: I893e73f2aab3227381e44406fa285613e4ba2904 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/11374 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -105,12 +105,9 @@ Name(APR0, Package(){
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Package(){0x0013FFFF, 0, 0, 18 },
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Package(){0x0013FFFF, 1, 0, 17 },
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Package(){0x0016FFFF, 0, 0, 18 },
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Package(){0x0016FFFF, 1, 0, 17 },
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/* Bus 0, Dev 10 - USB: XHCI func 0, 1 */
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Package(){0x0010FFFF, 0, 0, 0x12},
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Package(){0x0010FFFF, 1, 0, 0x11},
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Package(){0x0010FFFF, 0, 0, 18},
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Package(){0x0010FFFF, 1, 0, 17},
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/* Bus 0, Dev 17 - SATA controller */
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Package(){0x0011FFFF, 0, 0, 19 },
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@ -144,10 +141,10 @@ Name(PS4, Package(){
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})
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Name(APS4, Package(){
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/* PCIe slot - Hooked to PCIe slot 4 */
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Package(){0x0000FFFF, 0, 0, 16 },
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Package(){0x0000FFFF, 1, 0, 17 },
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Package(){0x0000FFFF, 2, 0, 18 },
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Package(){0x0000FFFF, 3, 0, 19 },
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Package(){0x0000FFFF, 0, 0, 24 },
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Package(){0x0000FFFF, 1, 0, 25 },
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Package(){0x0000FFFF, 2, 0, 26 },
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Package(){0x0000FFFF, 3, 0, 27 },
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})
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/* GPP 0 */
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@ -158,10 +155,10 @@ Name(PS5, Package(){
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Package(){0x0000FFFF, 3, INTA, 0 },
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})
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Name(APS5, Package(){
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Package(){0x0000FFFF, 0, 0, 17 },
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Package(){0x0000FFFF, 1, 0, 18 },
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Package(){0x0000FFFF, 2, 0, 19 },
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Package(){0x0000FFFF, 3, 0, 16 },
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Package(){0x0000FFFF, 0, 0, 28 },
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Package(){0x0000FFFF, 1, 0, 29 },
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Package(){0x0000FFFF, 2, 0, 30 },
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Package(){0x0000FFFF, 3, 0, 31 },
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})
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/* GPP 1 */
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@ -172,10 +169,10 @@ Name(PS6, Package(){
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Package(){0x0000FFFF, 3, INTB, 0 },
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})
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Name(APS6, Package(){
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Package(){0x0000FFFF, 0, 0, 18 },
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Package(){0x0000FFFF, 1, 0, 19 },
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Package(){0x0000FFFF, 2, 0, 16 },
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Package(){0x0000FFFF, 3, 0, 17 },
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Package(){0x0000FFFF, 0, 0, 32 },
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Package(){0x0000FFFF, 1, 0, 33 },
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Package(){0x0000FFFF, 2, 0, 34 },
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Package(){0x0000FFFF, 3, 0, 35 },
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})
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/* GPP 2 */
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@ -186,10 +183,10 @@ Name(PS7, Package(){
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Package(){0x0000FFFF, 3, INTC, 0 },
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})
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Name(APS7, Package(){
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Package(){0x0000FFFF, 0, 0, 19 },
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Package(){0x0000FFFF, 1, 0, 16 },
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Package(){0x0000FFFF, 2, 0, 17 },
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Package(){0x0000FFFF, 3, 0, 18 },
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Package(){0x0000FFFF, 0, 0, 36 },
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Package(){0x0000FFFF, 1, 0, 37 },
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Package(){0x0000FFFF, 2, 0, 38 },
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Package(){0x0000FFFF, 3, 0, 39 },
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})
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/* GPP 3 */
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@ -200,9 +197,50 @@ Name(PS8, Package(){
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Package(){0x0000FFFF, 3, INTD, 0 },
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})
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Name(APS8, Package(){
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Package(){0x0000FFFF, 0, 0, 16 },
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Package(){0x0000FFFF, 1, 0, 17 },
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Package(){0x0000FFFF, 2, 0, 18 },
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Package(){0x0000FFFF, 3, 0, 18 },
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Package(){0x0000FFFF, 0, 0, 40 },
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Package(){0x0000FFFF, 1, 0, 41 },
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Package(){0x0000FFFF, 2, 0, 42 },
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Package(){0x0000FFFF, 3, 0, 43 },
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})
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/* GFX 2 */
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Name(PSA, Package(){
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Package(){0x0000FFFF, 0, INTA, 0 },
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Package(){0x0000FFFF, 1, INTB, 0 },
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Package(){0x0000FFFF, 2, INTC, 0 },
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Package(){0x0000FFFF, 3, INTD, 0 },
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})
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Name(APSA, Package(){
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Package(){0x0000FFFF, 0, 0, 52 },
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Package(){0x0000FFFF, 1, 0, 53 },
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Package(){0x0000FFFF, 2, 0, 54 },
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Package(){0x0000FFFF, 3, 0, 55 },
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})
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/* GFX 3 */
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Name(PSB, Package(){
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Package(){0x0000FFFF, 0, INTA, 0 },
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Package(){0x0000FFFF, 1, INTB, 0 },
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Package(){0x0000FFFF, 2, INTC, 0 },
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Package(){0x0000FFFF, 3, INTD, 0 },
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})
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Name(APSB, Package(){
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Package(){0x0000FFFF, 0, 0, 27 },
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Package(){0x0000FFFF, 1, 0, 24 },
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Package(){0x0000FFFF, 2, 0, 25 },
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Package(){0x0000FFFF, 3, 0, 26 },
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})
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/* GFX 4 */
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Name(PSC, Package(){
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Package(){0x0000FFFF, 0, INTA, 0 },
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Package(){0x0000FFFF, 1, INTB, 0 },
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Package(){0x0000FFFF, 2, INTC, 0 },
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Package(){0x0000FFFF, 3, INTD, 0 },
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})
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Name(APSC, Package(){
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Package(){0x0000FFFF, 0, 0, 31 },
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Package(){0x0000FFFF, 1, 0, 28 },
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Package(){0x0000FFFF, 2, 0, 29 },
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Package(){0x0000FFFF, 3, 0, 30 },
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})
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@ -94,3 +94,38 @@ Device(PBR8) {
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Return (PS8) /* PIC Mode */
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} /* end _PRT */
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} /* end PBR8 */
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/* GFX 1 */
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Device(PBR9) {
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Name(_ADR, 0x00030002)
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} /* end PBR8 */
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/* GFX 2 */
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Device(PBRA) {
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Name(_ADR, 0x00030003)
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Name(_PRW, Package() {0x18, 4})
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Method(_PRT,0) {
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If(PMOD){ Return(APSA) } /* APIC mode */
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Return (PSA) /* PIC Mode */
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} /* end _PRT */
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} /* end PBR8 */
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/* GFX 3 */
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Device(PBRB) {
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Name(_ADR, 0x00030004)
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Name(_PRW, Package() {0x18, 4})
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Method(_PRT,0) {
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If(PMOD){ Return(APSB) } /* APIC mode */
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Return (PSB) /* PIC Mode */
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} /* end _PRT */
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} /* end PBR8 */
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/* GFX 4 */
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Device(PBRC) {
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Name(_ADR, 0x00030005)
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Name(_PRW, Package() {0x18, 4})
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Method(_PRT,0) {
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If(PMOD){ Return(APSC) } /* APIC mode */
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Return (PSC) /* PIC Mode */
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} /* end _PRT */
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} /* end PBR8 */
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