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SB800 CIMX code can share the AGESA V5 lib code, 

some platform only use sb800 cimx code, not use AGESA v5 code.
for such platform, one can compile the sb800 cimx and AGESA v5 lib code.

Signed-off-by: Kerry She <kerry.she@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6559 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Kerry She 2011-05-07 08:43:40 +00:00 committed by Kerry She
parent 1c85c7794e
commit eb995c209c
3 changed files with 13 additions and 2 deletions
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2
src/southbridge/amd/cimx_wrapper/sb800/Amd.h
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@ -161,7 +161,7 @@ typedef struct _SB_CPUID_DATA {
IN OUT unsigned int EBX_Reg; ///< CPUID instruction result in EBX
IN OUT unsigned int ECX_Reg; ///< CPUID instruction result in ECX
IN OUT unsigned int EDX_Reg; ///< CPUID instruction result in EDX
} SB_CPUID_DATA;
} CPUID_DATA;
#define WARM_RESET 1
#define COLD_RESET 2 // Cold reset

11
src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
View File

@ -104,3 +104,14 @@ AGESA_STATUS AmdSbDispatcher (IN void *pConfig);
*
*/
void AmdSbCopyMem (IN void* pDest, IN void* pSource, IN unsigned int Length);
/* SB800 CIMx and AGESA V5 can share lib functions */
unsigned char ReadIo8(IN unsigned short Address);
unsigned short ReadIo16(IN unsigned short Address);
unsigned int ReadIo32(IN unsigned short Address);
void WriteIo8(IN unsigned short Address, IN unsigned char Data);
void WriteIo16(IN unsigned short Address, IN unsigned short Data);
void WriteIo32(IN unsigned short Address, IN unsigned int Data);
void CpuidRead(IN unsigned int CpuidFcnAddress, OUT CPUID_DATA *Value);
unsigned char ReadNumberOfCpuCores(void);

2
src/vendorcode/amd/cimx/sb800/SBCMN.c
View File

@ -329,7 +329,7 @@ commonInitEarlyBoot (
{
UINT32 abValue;
UINT16 dwTempVar;
SB_CPUID_DATA CpuId;
CPUID_DATA CpuId;
UINT8 cimNativepciesupport;
UINT8 cimIrConfig;
UINT8 Data;