GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/octopus/variants/bobba: fix disable_xhci_lfps_pm by sku 

due to overridetree.cb set disable_xhci_lfps_pm = 0,
need correct condition expression to let function work.

BUG=b:146768983
BRANCH=octopus
TEST=build coreboot with DisableXhciLfpsPM being set to 1 and flash
     the image to the device. Run following command to check if
     bits[7:4] is set 0:
     >iotools mmio_read32 "XHCI MMIO BAR + 0x80A4"

Signed-off-by: Pan Sheng-Liang <sheng-liang.pan@quanta.corp-partner.google.com>
Change-Id: I53621d7674a531adfa40e8703cb2cd01c50376b8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42564
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Marco Chen <marcochen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sheng-Liang Pan 2020-06-19 19:09:51 +08:00 committed by Patrick Georgi
parent 2ef3b2df1f
commit eba0433b17
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/octopus/variants/bobba/variant.c
View File

@ -82,7 +82,7 @@ void variant_update_devtree(struct device *dev)
cfg = (struct soc_intel_apollolake_config *)dev->chip_info; cfg = (struct soc_intel_apollolake_config *)dev->chip_info;
if (cfg != NULL && cfg->disable_xhci_lfps_pm) { if (cfg != NULL && (cfg->disable_xhci_lfps_pm != 1)) {
switch (google_chromeec_get_board_sku()) { switch (google_chromeec_get_board_sku()) {
case 37: case 37:
case 38: case 38: