Documentation/soc/intel/fsp/ppi: Document new feature to dispatch external PPI
Some new feature added into FSP specification to perform dispatching of external PPI service from boot firmware (coreboot) to FSP. Change-Id: Iaf6b54ccd27e21860539bb2a9966054fdb027108 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31839 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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* [FSP Specification 1.1](https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v1-1.pdf)
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* [FSP Specification 2.0](https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v2.pdf)
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## Additional Features in FSP 2.1 specification
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- [PPI](ppi/ppi.md)
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# PEIM to PEIM Interface (PPI)
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This section is intended to document the purpose of creating PPI service
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inside coreboot space to perform some specific operation related to CPU,
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chipset using Intel FSP. This feature is added into FSP specification 2.1
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where FSP should be able to locate PPI, published by boot firmware and
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able to execute the same in FSP's context.
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* [What is PPI](https://www.intel.com/content/dam/www/public/us/en/documents/reference-guides/efi-pei-cis-v09.pdf)
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