device/oprom/yabel: add IS_ENABLED() around Kconfig symbol references

Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.

Change-Id: I82bf68a7ee54ff88f65aacc9eb0dbc30d013aae0
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20337
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Martin Roth 2017-06-24 13:58:52 -06:00
parent ffdee287df
commit ebade5dec9
8 changed files with 50 additions and 50 deletions

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@ -52,7 +52,7 @@
#include <device/device.h> #include <device/device.h>
#include "compat/rtas.h" #include "compat/rtas.h"
#if CONFIG_X86EMU_DEBUG_TIMINGS #if IS_ENABLED(CONFIG_X86EMU_DEBUG_TIMINGS)
struct mono_time zero; struct mono_time zero;
#endif #endif
@ -87,44 +87,44 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad
{ {
u8 *rom_image; u8 *rom_image;
int i = 0; int i = 0;
#if CONFIG_X86EMU_DEBUG #if IS_ENABLED(CONFIG_X86EMU_DEBUG)
debug_flags = 0; debug_flags = 0;
#if CONFIG_X86EMU_DEBUG_JMP #if IS_ENABLED(CONFIG_X86EMU_DEBUG_JMP)
debug_flags |= DEBUG_JMP; debug_flags |= DEBUG_JMP;
#endif #endif
#if CONFIG_X86EMU_DEBUG_TRACE #if IS_ENABLED(CONFIG_X86EMU_DEBUG_TRACE)
debug_flags |= DEBUG_TRACE_X86EMU; debug_flags |= DEBUG_TRACE_X86EMU;
#endif #endif
#if CONFIG_X86EMU_DEBUG_PNP #if IS_ENABLED(CONFIG_X86EMU_DEBUG_PNP)
debug_flags |= DEBUG_PNP; debug_flags |= DEBUG_PNP;
#endif #endif
#if CONFIG_X86EMU_DEBUG_DISK #if IS_ENABLED(CONFIG_X86EMU_DEBUG_DISK)
debug_flags |= DEBUG_DISK; debug_flags |= DEBUG_DISK;
#endif #endif
#if CONFIG_X86EMU_DEBUG_PMM #if IS_ENABLED(CONFIG_X86EMU_DEBUG_PMM)
debug_flags |= DEBUG_PMM; debug_flags |= DEBUG_PMM;
#endif #endif
#if CONFIG_X86EMU_DEBUG_VBE #if IS_ENABLED(CONFIG_X86EMU_DEBUG_VBE)
debug_flags |= DEBUG_VBE; debug_flags |= DEBUG_VBE;
#endif #endif
#if CONFIG_X86EMU_DEBUG_INT10 #if IS_ENABLED(CONFIG_X86EMU_DEBUG_INT10)
debug_flags |= DEBUG_PRINT_INT10; debug_flags |= DEBUG_PRINT_INT10;
#endif #endif
#if CONFIG_X86EMU_DEBUG_INTERRUPTS #if IS_ENABLED(CONFIG_X86EMU_DEBUG_INTERRUPTS)
debug_flags |= DEBUG_INTR; debug_flags |= DEBUG_INTR;
#endif #endif
#if CONFIG_X86EMU_DEBUG_CHECK_VMEM_ACCESS #if IS_ENABLED(CONFIG_X86EMU_DEBUG_CHECK_VMEM_ACCESS)
debug_flags |= DEBUG_CHECK_VMEM_ACCESS; debug_flags |= DEBUG_CHECK_VMEM_ACCESS;
#endif #endif
#if CONFIG_X86EMU_DEBUG_MEM #if IS_ENABLED(CONFIG_X86EMU_DEBUG_MEM)
debug_flags |= DEBUG_MEM; debug_flags |= DEBUG_MEM;
#endif #endif
#if CONFIG_X86EMU_DEBUG_IO #if IS_ENABLED(CONFIG_X86EMU_DEBUG_IO)
debug_flags |= DEBUG_IO; debug_flags |= DEBUG_IO;
#endif #endif
#endif #endif
#if CONFIG_X86EMU_DEBUG_TIMINGS #if IS_ENABLED(CONFIG_X86EMU_DEBUG_TIMINGS)
/* required for i915tool compatible output */ /* required for i915tool compatible output */
zero.microseconds = 0; zero.microseconds = 0;
#endif #endif
@ -345,7 +345,7 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad
* some boot device status in AX (see PNP BIOS Spec Section 3.3 * some boot device status in AX (see PNP BIOS Spec Section 3.3
*/ */
DEBUG_PRINTF_CS_IP("Option ROM Exit Status: %04x\n", M.x86.R_AX); DEBUG_PRINTF_CS_IP("Option ROM Exit Status: %04x\n", M.x86.R_AX);
#if CONFIG_X86EMU_DEBUG #if IS_ENABLED(CONFIG_X86EMU_DEBUG)
DEBUG_PRINTF("Exit Status Decode:\n"); DEBUG_PRINTF("Exit Status Decode:\n");
if (M.x86.R_AX & 0x100) { // bit 8 if (M.x86.R_AX & 0x100) { // bit 8
DEBUG_PRINTF DEBUG_PRINTF

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@ -45,7 +45,7 @@
#define VMEM_SIZE (1024 * 1024) /* 1 MB */ #define VMEM_SIZE (1024 * 1024) /* 1 MB */
#if !CONFIG_YABEL_DIRECTHW #if !IS_ENABLED(CONFIG_YABEL_DIRECTHW)
#if CONFIG_YABEL_VIRTMEM_LOCATION #if CONFIG_YABEL_VIRTMEM_LOCATION
u8* vmem = (u8 *) CONFIG_YABEL_VIRTMEM_LOCATION; u8* vmem = (u8 *) CONFIG_YABEL_VIRTMEM_LOCATION;
#else #else
@ -63,7 +63,7 @@ void run_bios(struct device * dev, unsigned long addr)
biosemu(vmem, VMEM_SIZE, dev, addr); biosemu(vmem, VMEM_SIZE, dev, addr);
#if CONFIG_FRAMEBUFFER_SET_VESA_MODE #if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)
vbe_set_graphics(); vbe_set_graphics();
#endif #endif
} }
@ -73,7 +73,7 @@ unsigned long tb_freq = 0;
u64 get_time(void) u64 get_time(void)
{ {
u64 act = 0; u64 act = 0;
#if CONFIG_ARCH_X86 #if IS_ENABLED(CONFIG_ARCH_X86)
u32 eax, edx; u32 eax, edx;
__asm__ __volatile__( __asm__ __volatile__(

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@ -58,7 +58,7 @@ typedef struct {
u64 size; u64 size;
} __attribute__ ((__packed__)) assigned_address_t; } __attribute__ ((__packed__)) assigned_address_t;
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL #if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
/* coreboot version */ /* coreboot version */
static void static void
@ -131,7 +131,7 @@ biosemu_dev_get_addr_info(void)
} }
// store last entry index of translate_address_array // store last entry index of translate_address_array
taa_last_entry = taa_index - 1; taa_last_entry = taa_index - 1;
#if CONFIG_X86EMU_DEBUG #if IS_ENABLED(CONFIG_X86EMU_DEBUG)
//dump translate_address_array //dump translate_address_array
printf("translate_address_array:\n"); printf("translate_address_array:\n");
translate_address_t ta; translate_address_t ta;
@ -215,7 +215,7 @@ biosemu_dev_get_addr_info(void)
} }
// store last entry index of translate_address_array // store last entry index of translate_address_array
taa_last_entry = taa_index - 1; taa_last_entry = taa_index - 1;
#if CONFIG_X86EMU_DEBUG #if IS_ENABLED(CONFIG_X86EMU_DEBUG)
//dump translate_address_array //dump translate_address_array
printf("translate_address_array:\n"); printf("translate_address_array:\n");
translate_address_t ta; translate_address_t ta;
@ -247,7 +247,7 @@ biosemu_add_special_memory(u32 start, u32 size)
translate_address_array[taa_index].address_offset = 0; translate_address_array[taa_index].address_offset = 0;
} }
#if !CONFIG_PCI_OPTION_ROM_RUN_YABEL #if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
// to simulate accesses to legacy VGA Memory (0xA0000-0xBFFFF) // to simulate accesses to legacy VGA Memory (0xA0000-0xBFFFF)
// we look for the first prefetchable memory BAR, if no prefetchable BAR found, // we look for the first prefetchable memory BAR, if no prefetchable BAR found,
// we use the first memory BAR // we use the first memory BAR
@ -309,7 +309,7 @@ biosemu_dev_get_device_vendor_id(void)
{ {
u32 pci_config_0; u32 pci_config_0;
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL #if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_config_0 = pci_read_config32(bios_device.dev, 0x0); pci_config_0 = pci_read_config32(bios_device.dev, 0x0);
#else #else
pci_config_0 = pci_config_0 =
@ -371,7 +371,7 @@ biosemu_dev_check_exprom(unsigned long rom_base_addr)
memcpy(&pci_ds, (void *) (rom_base_addr + pci_ds_offset), memcpy(&pci_ds, (void *) (rom_base_addr + pci_ds_offset),
sizeof(pci_ds)); sizeof(pci_ds));
clr_ci(); clr_ci();
#if CONFIG_X86EMU_DEBUG #if IS_ENABLED(CONFIG_X86EMU_DEBUG)
DEBUG_PRINTF("PCI Data Structure @%lx:\n", DEBUG_PRINTF("PCI Data Structure @%lx:\n",
rom_base_addr + pci_ds_offset); rom_base_addr + pci_ds_offset);
dump((void *) &pci_ds, sizeof(pci_ds)); dump((void *) &pci_ds, sizeof(pci_ds));
@ -435,7 +435,7 @@ biosemu_dev_init(struct device * device)
DEBUG_PRINTF("%s\n", __func__); DEBUG_PRINTF("%s\n", __func__);
memset(&bios_device, 0, sizeof(bios_device)); memset(&bios_device, 0, sizeof(bios_device));
#if !CONFIG_PCI_OPTION_ROM_RUN_YABEL #if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
bios_device.ihandle = of_open(device_name); bios_device.ihandle = of_open(device_name);
if (bios_device.ihandle == 0) { if (bios_device.ihandle == 0) {
DEBUG_PRINTF("%s is no valid device!\n", device_name); DEBUG_PRINTF("%s is no valid device!\n", device_name);
@ -446,7 +446,7 @@ biosemu_dev_init(struct device * device)
bios_device.dev = device; bios_device.dev = device;
#endif #endif
biosemu_dev_get_addr_info(); biosemu_dev_get_addr_info();
#if !CONFIG_PCI_OPTION_ROM_RUN_YABEL #if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
biosemu_dev_find_vmem_addr(); biosemu_dev_find_vmem_addr();
biosemu_dev_get_puid(); biosemu_dev_get_puid();
#endif #endif
@ -463,7 +463,7 @@ biosemu_dev_translate_address(int type, unsigned long * addr)
{ {
int i = 0; int i = 0;
translate_address_t ta; translate_address_t ta;
#if !CONFIG_PCI_OPTION_ROM_RUN_YABEL #if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
/* we don't need this hack for coreboot... we can access legacy areas */ /* we don't need this hack for coreboot... we can access legacy areas */
//check if it is an access to legacy VGA Mem... if it is, map the address //check if it is an access to legacy VGA Mem... if it is, map the address
//to the vmem BAR and then translate it... //to the vmem BAR and then translate it...

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@ -105,7 +105,7 @@ typedef struct {
} biosemu_device_t; } biosemu_device_t;
typedef struct { typedef struct {
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL #if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
unsigned long info; unsigned long info;
#else #else
u8 info; u8 info;
@ -149,7 +149,7 @@ u8 biosemu_dev_translate_address(int type, unsigned long * addr);
static inline void static inline void
out32le(void *addr, u32 val) out32le(void *addr, u32 val)
{ {
#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM #if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM)
*((u32*) addr) = cpu_to_le32(val); *((u32*) addr) = cpu_to_le32(val);
#else #else
asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr)); asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr));
@ -160,7 +160,7 @@ static inline u32
in32le(void *addr) in32le(void *addr)
{ {
u32 val; u32 val;
#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM #if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM)
val = cpu_to_le32(*((u32 *) addr)); val = cpu_to_le32(*((u32 *) addr));
#else #else
asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr)); asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr));
@ -171,7 +171,7 @@ in32le(void *addr)
static inline void static inline void
out16le(void *addr, u16 val) out16le(void *addr, u16 val)
{ {
#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM #if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM)
*((u16*) addr) = cpu_to_le16(val); *((u16*) addr) = cpu_to_le16(val);
#else #else
asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr)); asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr));
@ -182,7 +182,7 @@ static inline u16
in16le(void *addr) in16le(void *addr)
{ {
u16 val; u16 val;
#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM #if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM)
val = cpu_to_le16(*((u16*) addr)); val = cpu_to_le16(*((u16*) addr));
#else #else
asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr)); asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr));

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@ -362,7 +362,7 @@ handleInt1a(void)
DEBUG_PRINTF_INTR("%s(): function: %x: PCI Find Device\n", DEBUG_PRINTF_INTR("%s(): function: %x: PCI Find Device\n",
__func__, M.x86.R_AX); __func__, M.x86.R_AX);
/* FixME: support SI != 0 */ /* FixME: support SI != 0 */
#if CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES #if IS_ENABLED(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES)
dev = dev_find_device(M.x86.R_DX, M.x86.R_CX, 0); dev = dev_find_device(M.x86.R_DX, M.x86.R_CX, 0);
if (dev != 0) { if (dev != 0) {
DEBUG_PRINTF_INTR DEBUG_PRINTF_INTR
@ -403,7 +403,7 @@ handleInt1a(void)
offs = M.x86.R_DI; offs = M.x86.R_DI;
DEBUG_PRINTF_INTR("%s(): function: %x: PCI Config Read from device: bus: %02x, devfn: %02x, offset: %02x\n", DEBUG_PRINTF_INTR("%s(): function: %x: PCI Config Read from device: bus: %02x, devfn: %02x, offset: %02x\n",
__func__, M.x86.R_AX, bus, devfn, offs); __func__, M.x86.R_AX, bus, devfn, offs);
#if CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES #if IS_ENABLED(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES)
dev = dev_find_slot(bus, devfn); dev = dev_find_slot(bus, devfn);
DEBUG_PRINTF_INTR("%s(): function: %x: dev_find_slot() returned: %s\n", DEBUG_PRINTF_INTR("%s(): function: %x: dev_find_slot() returned: %s\n",
__func__, M.x86.R_AX, dev_path(dev)); __func__, M.x86.R_AX, dev_path(dev));
@ -427,7 +427,7 @@ handleInt1a(void)
switch (M.x86.R_AX) { switch (M.x86.R_AX) {
case 0xb108: case 0xb108:
M.x86.R_CL = M.x86.R_CL =
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL #if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_read_config8(dev, offs); pci_read_config8(dev, offs);
#else #else
(u8) rtas_pci_config_read(bios_device. (u8) rtas_pci_config_read(bios_device.
@ -442,7 +442,7 @@ handleInt1a(void)
break; break;
case 0xb109: case 0xb109:
M.x86.R_CX = M.x86.R_CX =
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL #if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_read_config16(dev, offs); pci_read_config16(dev, offs);
#else #else
(u16) rtas_pci_config_read(bios_device. (u16) rtas_pci_config_read(bios_device.
@ -457,7 +457,7 @@ handleInt1a(void)
break; break;
case 0xb10a: case 0xb10a:
M.x86.R_ECX = M.x86.R_ECX =
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL #if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_read_config32(dev, offs); pci_read_config32(dev, offs);
#else #else
(u32) rtas_pci_config_read(bios_device. (u32) rtas_pci_config_read(bios_device.
@ -495,7 +495,7 @@ handleInt1a(void)
} else { } else {
switch (M.x86.R_AX) { switch (M.x86.R_AX) {
case 0xb10b: case 0xb10b:
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL #if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_write_config8(bios_device.dev, offs, M.x86.R_CL); pci_write_config8(bios_device.dev, offs, M.x86.R_CL);
#else #else
rtas_pci_config_write(bios_device.puid, 1, bus, rtas_pci_config_write(bios_device.puid, 1, bus,
@ -507,7 +507,7 @@ handleInt1a(void)
M.x86.R_CL); M.x86.R_CL);
break; break;
case 0xb10c: case 0xb10c:
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL #if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_write_config16(bios_device.dev, offs, M.x86.R_CX); pci_write_config16(bios_device.dev, offs, M.x86.R_CX);
#else #else
rtas_pci_config_write(bios_device.puid, 2, bus, rtas_pci_config_write(bios_device.puid, 2, bus,
@ -519,7 +519,7 @@ handleInt1a(void)
M.x86.R_CX); M.x86.R_CX);
break; break;
case 0xb10d: case 0xb10d:
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL #if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_write_config32(bios_device.dev, offs, M.x86.R_ECX); pci_write_config32(bios_device.dev, offs, M.x86.R_ECX);
#else #else
rtas_pci_config_write(bios_device.puid, 4, bus, rtas_pci_config_write(bios_device.puid, 4, bus,

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@ -47,7 +47,7 @@
#include <arch/io.h> #include <arch/io.h>
#if CONFIG_YABEL_DIRECTHW #if IS_ENABLED(CONFIG_YABEL_DIRECTHW)
u8 my_inb(X86EMU_pioAddr addr) u8 my_inb(X86EMU_pioAddr addr)
{ {
u8 val; u8 val;
@ -426,7 +426,7 @@ pci_cfg_read(X86EMU_pioAddr addr, u8 size)
offs += (addr - 0xCFC); // if addr is not 0xcfc, the offset is moved accordingly offs += (addr - 0xCFC); // if addr is not 0xcfc, the offset is moved accordingly
DEBUG_PRINTF_INTR("%s(): PCI Config Read from device: bus: %02x, devfn: %02x, offset: %02x\n", DEBUG_PRINTF_INTR("%s(): PCI Config Read from device: bus: %02x, devfn: %02x, offset: %02x\n",
__func__, bus, devfn, offs); __func__, bus, devfn, offs);
#if CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES #if IS_ENABLED(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES)
dev = dev_find_slot(bus, devfn); dev = dev_find_slot(bus, devfn);
DEBUG_PRINTF_INTR("%s(): dev_find_slot() returned: %s\n", DEBUG_PRINTF_INTR("%s(): dev_find_slot() returned: %s\n",
__func__, dev_path(dev)); __func__, dev_path(dev));
@ -446,7 +446,7 @@ pci_cfg_read(X86EMU_pioAddr addr, u8 size)
HALT_SYS(); HALT_SYS();
return 0; return 0;
} else { } else {
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL #if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
switch (size) { switch (size) {
case 1: case 1:
rval = pci_read_config8(dev, offs); rval = pci_read_config8(dev, offs);
@ -495,11 +495,11 @@ pci_cfg_write(X86EMU_pioAddr addr, u32 val, u8 size)
printf printf
("Config write access invalid! PCI device %x:%x.%x, offs: %x\n", ("Config write access invalid! PCI device %x:%x.%x, offs: %x\n",
bus, devfn >> 3, devfn & 7, offs); bus, devfn >> 3, devfn & 7, offs);
#if !CONFIG_YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG #if !IS_ENABLED(CONFIG_YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG)
HALT_SYS(); HALT_SYS();
#endif #endif
} else { } else {
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL #if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
switch (size) { switch (size) {
case 1: case 1:
pci_write_config8(bios_device.dev, offs, val); pci_write_config8(bios_device.dev, offs, val);

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@ -41,10 +41,10 @@
#include "compat/time.h" #include "compat/time.h"
#include <device/resource.h> #include <device/resource.h>
#if !CONFIG_YABEL_DIRECTHW || !CONFIG_YABEL_DIRECTHW #if !IS_ENABLED(CONFIG_YABEL_DIRECTHW) || !IS_ENABLED(CONFIG_YABEL_DIRECTHW)
// define a check for access to certain (virtual) memory regions (interrupt handlers, BIOS Data Area, ...) // define a check for access to certain (virtual) memory regions (interrupt handlers, BIOS Data Area, ...)
#if CONFIG_X86EMU_DEBUG #if IS_ENABLED(CONFIG_X86EMU_DEBUG)
static u8 in_check = 0; // to avoid recursion... static u8 in_check = 0; // to avoid recursion...
static inline void DEBUG_CHECK_VMEM_READ(u32 _addr, u32 _rval) static inline void DEBUG_CHECK_VMEM_READ(u32 _addr, u32 _rval)

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@ -34,7 +34,7 @@
#include <string.h> #include <string.h>
#include <types.h> #include <types.h>
#if CONFIG_FRAMEBUFFER_SET_VESA_MODE #if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)
#include <boot/coreboot_tables.h> #include <boot/coreboot_tables.h>
#endif #endif
@ -66,7 +66,7 @@ u8 *vbe_info_buffer = 0;
u8 *biosmem; u8 *biosmem;
u32 biosmem_size; u32 biosmem_size;
#if CONFIG_FRAMEBUFFER_SET_VESA_MODE #if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)
static inline u8 static inline u8
vbe_prepare(void) vbe_prepare(void)
{ {
@ -734,7 +734,7 @@ void vbe_set_graphics(void)
vbe_get_mode_info(&mode_info); vbe_get_mode_info(&mode_info);
vbe_set_mode(&mode_info); vbe_set_mode(&mode_info);
#if CONFIG_BOOTSPLASH #if IS_ENABLED(CONFIG_BOOTSPLASH)
unsigned char *framebuffer = unsigned char *framebuffer =
(unsigned char *) le32_to_cpu(mode_info.vesa.phys_base_ptr); (unsigned char *) le32_to_cpu(mode_info.vesa.phys_base_ptr);
DEBUG_PRINTF_VBE("FRAMEBUFFER: 0x%p\n", framebuffer); DEBUG_PRINTF_VBE("FRAMEBUFFER: 0x%p\n", framebuffer);