device/oprom/yabel: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen in a follow-on commmit. Change-Id: I82bf68a7ee54ff88f65aacc9eb0dbc30d013aae0 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20337 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
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@ -52,7 +52,7 @@
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#include <device/device.h>
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#include "compat/rtas.h"
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#if CONFIG_X86EMU_DEBUG_TIMINGS
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_TIMINGS)
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struct mono_time zero;
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#endif
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@ -87,44 +87,44 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad
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{
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u8 *rom_image;
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int i = 0;
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#if CONFIG_X86EMU_DEBUG
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG)
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debug_flags = 0;
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#if CONFIG_X86EMU_DEBUG_JMP
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_JMP)
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debug_flags |= DEBUG_JMP;
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#endif
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#if CONFIG_X86EMU_DEBUG_TRACE
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_TRACE)
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debug_flags |= DEBUG_TRACE_X86EMU;
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#endif
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#if CONFIG_X86EMU_DEBUG_PNP
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_PNP)
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debug_flags |= DEBUG_PNP;
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#endif
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#if CONFIG_X86EMU_DEBUG_DISK
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_DISK)
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debug_flags |= DEBUG_DISK;
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#endif
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#if CONFIG_X86EMU_DEBUG_PMM
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_PMM)
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debug_flags |= DEBUG_PMM;
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#endif
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#if CONFIG_X86EMU_DEBUG_VBE
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_VBE)
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debug_flags |= DEBUG_VBE;
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#endif
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#if CONFIG_X86EMU_DEBUG_INT10
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_INT10)
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debug_flags |= DEBUG_PRINT_INT10;
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#endif
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#if CONFIG_X86EMU_DEBUG_INTERRUPTS
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_INTERRUPTS)
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debug_flags |= DEBUG_INTR;
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#endif
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#if CONFIG_X86EMU_DEBUG_CHECK_VMEM_ACCESS
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_CHECK_VMEM_ACCESS)
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debug_flags |= DEBUG_CHECK_VMEM_ACCESS;
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#endif
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#if CONFIG_X86EMU_DEBUG_MEM
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_MEM)
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debug_flags |= DEBUG_MEM;
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#endif
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#if CONFIG_X86EMU_DEBUG_IO
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_IO)
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debug_flags |= DEBUG_IO;
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#endif
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#endif
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#if CONFIG_X86EMU_DEBUG_TIMINGS
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG_TIMINGS)
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/* required for i915tool compatible output */
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zero.microseconds = 0;
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#endif
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@ -345,7 +345,7 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad
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* some boot device status in AX (see PNP BIOS Spec Section 3.3
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*/
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DEBUG_PRINTF_CS_IP("Option ROM Exit Status: %04x\n", M.x86.R_AX);
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#if CONFIG_X86EMU_DEBUG
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG)
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DEBUG_PRINTF("Exit Status Decode:\n");
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if (M.x86.R_AX & 0x100) { // bit 8
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DEBUG_PRINTF
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@ -45,7 +45,7 @@
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#define VMEM_SIZE (1024 * 1024) /* 1 MB */
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#if !CONFIG_YABEL_DIRECTHW
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#if !IS_ENABLED(CONFIG_YABEL_DIRECTHW)
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#if CONFIG_YABEL_VIRTMEM_LOCATION
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u8* vmem = (u8 *) CONFIG_YABEL_VIRTMEM_LOCATION;
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#else
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@ -63,7 +63,7 @@ void run_bios(struct device * dev, unsigned long addr)
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biosemu(vmem, VMEM_SIZE, dev, addr);
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#if CONFIG_FRAMEBUFFER_SET_VESA_MODE
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#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)
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vbe_set_graphics();
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#endif
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}
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@ -73,7 +73,7 @@ unsigned long tb_freq = 0;
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u64 get_time(void)
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{
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u64 act = 0;
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#if CONFIG_ARCH_X86
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#if IS_ENABLED(CONFIG_ARCH_X86)
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u32 eax, edx;
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__asm__ __volatile__(
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@ -58,7 +58,7 @@ typedef struct {
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u64 size;
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} __attribute__ ((__packed__)) assigned_address_t;
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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/* coreboot version */
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static void
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@ -131,7 +131,7 @@ biosemu_dev_get_addr_info(void)
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}
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// store last entry index of translate_address_array
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taa_last_entry = taa_index - 1;
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#if CONFIG_X86EMU_DEBUG
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG)
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//dump translate_address_array
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printf("translate_address_array:\n");
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translate_address_t ta;
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@ -215,7 +215,7 @@ biosemu_dev_get_addr_info(void)
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}
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// store last entry index of translate_address_array
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taa_last_entry = taa_index - 1;
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#if CONFIG_X86EMU_DEBUG
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG)
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//dump translate_address_array
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printf("translate_address_array:\n");
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translate_address_t ta;
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@ -247,7 +247,7 @@ biosemu_add_special_memory(u32 start, u32 size)
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translate_address_array[taa_index].address_offset = 0;
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}
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#if !CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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// to simulate accesses to legacy VGA Memory (0xA0000-0xBFFFF)
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// we look for the first prefetchable memory BAR, if no prefetchable BAR found,
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// we use the first memory BAR
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@ -309,7 +309,7 @@ biosemu_dev_get_device_vendor_id(void)
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{
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u32 pci_config_0;
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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pci_config_0 = pci_read_config32(bios_device.dev, 0x0);
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#else
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pci_config_0 =
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@ -371,7 +371,7 @@ biosemu_dev_check_exprom(unsigned long rom_base_addr)
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memcpy(&pci_ds, (void *) (rom_base_addr + pci_ds_offset),
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sizeof(pci_ds));
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clr_ci();
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#if CONFIG_X86EMU_DEBUG
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG)
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DEBUG_PRINTF("PCI Data Structure @%lx:\n",
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rom_base_addr + pci_ds_offset);
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dump((void *) &pci_ds, sizeof(pci_ds));
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@ -435,7 +435,7 @@ biosemu_dev_init(struct device * device)
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DEBUG_PRINTF("%s\n", __func__);
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memset(&bios_device, 0, sizeof(bios_device));
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#if !CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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bios_device.ihandle = of_open(device_name);
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if (bios_device.ihandle == 0) {
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DEBUG_PRINTF("%s is no valid device!\n", device_name);
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@ -446,7 +446,7 @@ biosemu_dev_init(struct device * device)
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bios_device.dev = device;
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#endif
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biosemu_dev_get_addr_info();
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#if !CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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biosemu_dev_find_vmem_addr();
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biosemu_dev_get_puid();
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#endif
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@ -463,7 +463,7 @@ biosemu_dev_translate_address(int type, unsigned long * addr)
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{
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int i = 0;
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translate_address_t ta;
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#if !CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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/* we don't need this hack for coreboot... we can access legacy areas */
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//check if it is an access to legacy VGA Mem... if it is, map the address
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//to the vmem BAR and then translate it...
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@ -105,7 +105,7 @@ typedef struct {
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} biosemu_device_t;
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typedef struct {
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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unsigned long info;
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#else
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u8 info;
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@ -149,7 +149,7 @@ u8 biosemu_dev_translate_address(int type, unsigned long * addr);
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static inline void
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out32le(void *addr, u32 val)
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{
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#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
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#if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM)
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*((u32*) addr) = cpu_to_le32(val);
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#else
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asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr));
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in32le(void *addr)
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{
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u32 val;
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#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
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#if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM)
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val = cpu_to_le32(*((u32 *) addr));
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#else
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asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr));
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@ -171,7 +171,7 @@ in32le(void *addr)
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static inline void
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out16le(void *addr, u16 val)
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{
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#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
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#if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM)
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*((u16*) addr) = cpu_to_le16(val);
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#else
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asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr));
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in16le(void *addr)
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{
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u16 val;
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#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
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#if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM)
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val = cpu_to_le16(*((u16*) addr));
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#else
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asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr));
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@ -362,7 +362,7 @@ handleInt1a(void)
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DEBUG_PRINTF_INTR("%s(): function: %x: PCI Find Device\n",
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__func__, M.x86.R_AX);
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/* FixME: support SI != 0 */
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#if CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES
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#if IS_ENABLED(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES)
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dev = dev_find_device(M.x86.R_DX, M.x86.R_CX, 0);
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if (dev != 0) {
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DEBUG_PRINTF_INTR
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offs = M.x86.R_DI;
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DEBUG_PRINTF_INTR("%s(): function: %x: PCI Config Read from device: bus: %02x, devfn: %02x, offset: %02x\n",
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__func__, M.x86.R_AX, bus, devfn, offs);
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#if CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES
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#if IS_ENABLED(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES)
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dev = dev_find_slot(bus, devfn);
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DEBUG_PRINTF_INTR("%s(): function: %x: dev_find_slot() returned: %s\n",
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__func__, M.x86.R_AX, dev_path(dev));
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switch (M.x86.R_AX) {
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case 0xb108:
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M.x86.R_CL =
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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pci_read_config8(dev, offs);
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#else
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(u8) rtas_pci_config_read(bios_device.
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break;
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case 0xb109:
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M.x86.R_CX =
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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pci_read_config16(dev, offs);
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#else
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(u16) rtas_pci_config_read(bios_device.
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@ -457,7 +457,7 @@ handleInt1a(void)
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break;
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case 0xb10a:
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M.x86.R_ECX =
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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pci_read_config32(dev, offs);
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#else
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(u32) rtas_pci_config_read(bios_device.
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} else {
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switch (M.x86.R_AX) {
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case 0xb10b:
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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pci_write_config8(bios_device.dev, offs, M.x86.R_CL);
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#else
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rtas_pci_config_write(bios_device.puid, 1, bus,
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M.x86.R_CL);
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break;
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case 0xb10c:
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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pci_write_config16(bios_device.dev, offs, M.x86.R_CX);
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#else
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rtas_pci_config_write(bios_device.puid, 2, bus,
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M.x86.R_CX);
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break;
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case 0xb10d:
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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pci_write_config32(bios_device.dev, offs, M.x86.R_ECX);
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#else
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rtas_pci_config_write(bios_device.puid, 4, bus,
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@ -47,7 +47,7 @@
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#include <arch/io.h>
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#if CONFIG_YABEL_DIRECTHW
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#if IS_ENABLED(CONFIG_YABEL_DIRECTHW)
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u8 my_inb(X86EMU_pioAddr addr)
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{
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u8 val;
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@ -426,7 +426,7 @@ pci_cfg_read(X86EMU_pioAddr addr, u8 size)
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offs += (addr - 0xCFC); // if addr is not 0xcfc, the offset is moved accordingly
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DEBUG_PRINTF_INTR("%s(): PCI Config Read from device: bus: %02x, devfn: %02x, offset: %02x\n",
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__func__, bus, devfn, offs);
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#if CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES
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#if IS_ENABLED(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES)
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dev = dev_find_slot(bus, devfn);
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DEBUG_PRINTF_INTR("%s(): dev_find_slot() returned: %s\n",
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__func__, dev_path(dev));
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@ -446,7 +446,7 @@ pci_cfg_read(X86EMU_pioAddr addr, u8 size)
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HALT_SYS();
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return 0;
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} else {
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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switch (size) {
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case 1:
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rval = pci_read_config8(dev, offs);
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printf
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("Config write access invalid! PCI device %x:%x.%x, offs: %x\n",
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bus, devfn >> 3, devfn & 7, offs);
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#if !CONFIG_YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG
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#if !IS_ENABLED(CONFIG_YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG)
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HALT_SYS();
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#endif
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} else {
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
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switch (size) {
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case 1:
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pci_write_config8(bios_device.dev, offs, val);
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@ -41,10 +41,10 @@
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#include "compat/time.h"
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#include <device/resource.h>
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#if !CONFIG_YABEL_DIRECTHW || !CONFIG_YABEL_DIRECTHW
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#if !IS_ENABLED(CONFIG_YABEL_DIRECTHW) || !IS_ENABLED(CONFIG_YABEL_DIRECTHW)
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// define a check for access to certain (virtual) memory regions (interrupt handlers, BIOS Data Area, ...)
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#if CONFIG_X86EMU_DEBUG
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#if IS_ENABLED(CONFIG_X86EMU_DEBUG)
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static u8 in_check = 0; // to avoid recursion...
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static inline void DEBUG_CHECK_VMEM_READ(u32 _addr, u32 _rval)
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@ -34,7 +34,7 @@
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#include <string.h>
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#include <types.h>
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#if CONFIG_FRAMEBUFFER_SET_VESA_MODE
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#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)
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#include <boot/coreboot_tables.h>
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#endif
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@ -66,7 +66,7 @@ u8 *vbe_info_buffer = 0;
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u8 *biosmem;
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u32 biosmem_size;
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#if CONFIG_FRAMEBUFFER_SET_VESA_MODE
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#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)
|
||||
static inline u8
|
||||
vbe_prepare(void)
|
||||
{
|
||||
|
@ -734,7 +734,7 @@ void vbe_set_graphics(void)
|
|||
vbe_get_mode_info(&mode_info);
|
||||
vbe_set_mode(&mode_info);
|
||||
|
||||
#if CONFIG_BOOTSPLASH
|
||||
#if IS_ENABLED(CONFIG_BOOTSPLASH)
|
||||
unsigned char *framebuffer =
|
||||
(unsigned char *) le32_to_cpu(mode_info.vesa.phys_base_ptr);
|
||||
DEBUG_PRINTF_VBE("FRAMEBUFFER: 0x%p\n", framebuffer);
|
||||
|
|
Loading…
Reference in New Issue