From ebd6dec110f35f6f004fcaf01d2122cced22a247 Mon Sep 17 00:00:00 2001 From: Frank Wu Date: Tue, 29 Mar 2022 18:26:28 +0800 Subject: [PATCH] mb/google/brya/var/banshee: Update the GPP_D12 as USB_C3_LSX_RX Update the GPP_D12 according to USB_C3_LSX_RX. BUG=b:225081954 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot chromeos-bootimage The device can be recognized when it is attached in port3. localhost /sys/bus/thunderbolt/devices # ls 0-0 1-0 1-0:3.1 1-3 domain0 domain1 Signed-off-by: Frank Wu Change-Id: I38caa76c855e683eb0587eb67ee9abc91af4545d Reviewed-on: https://review.coreboot.org/c/coreboot/+/63174 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai Reviewed-by: Paul Menzel --- src/mainboard/google/brya/variants/banshee/gpio.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/brya/variants/banshee/gpio.c b/src/mainboard/google/brya/variants/banshee/gpio.c index b8f4dab823..ae37c9089a 100644 --- a/src/mainboard/google/brya/variants/banshee/gpio.c +++ b/src/mainboard/google/brya/variants/banshee/gpio.c @@ -101,7 +101,8 @@ static const struct pad_config override_gpio_table[] = { /* D10 : ISH_SPI_CLK ==> USB_C2_LSX_RX_STRAP */ /* D11 : ISH_SPI_MISO ==> USB_C3_LSX_TX */ PAD_CFG_NF_LOCK(GPP_D11, NONE, NF4, LOCK_CONFIG), - /* D12 : ISH_SPI_MOSI ==> GPP_D12_STRAP */ + /* D12 : ISH_SPI_MOSI ==> USB_C3_LSX_RX */ + PAD_CFG_NF_LOCK(GPP_D12, NONE, NF4, LOCK_CONFIG), /* D13 : ISH_UART0_RXD ==> NC */ PAD_NC_LOCK(GPP_D13, NONE, LOCK_CONFIG), /* D14 : ISH_UART0_TXD ==> NC */