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soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value 

This patch increases PRERAM_CBMEM_CONSOLE_SIZE to fix
*** Pre-CBMEM romstage console overflowed, log truncated! ***
issue.

TEST=Verified on TGL platform.

Change-Id: Iae66b6a1260a9290b35d804487b7a07242c5ebc2
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41528
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
This commit is contained in:
Subrata Banik 2020-05-19 12:32:41 +05:30
parent 8a4536dfb7
commit ebf1daa001
2 changed files with 8 additions and 0 deletions
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4
src/soc/intel/jasperlake/Kconfig
View File

@ -207,4 +207,8 @@ config SOC_INTEL_JASPERLAKE_DEBUG_CONSENT
0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB),
3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC),
6:Enable (2-wire DCI OOB), 7:Manual
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0xe00
endif

4
src/soc/intel/tigerlake/Kconfig
View File

@ -205,4 +205,8 @@ config SOC_INTEL_TIGERLAKE_DEBUG_CONSENT
0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB),
3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC),
6:Enable (2-wire DCI OOB), 7:Manual
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0xe00
endif