mb/google/brya/var/agah: Reenable ASPM L1 substates
Now that the GPU CLKREQ# signal is working correctly, ASPM L1 substates can be enabled and appear functional. BUG=b:240390998 TEST=lspci reports them as functional, MODS does not hang Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I8297f6bbf7f5a1f7d4ac519bc5b7b3112a74a9a0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66811 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
932783daf8
commit
ec11a6e5b1
|
@ -81,7 +81,6 @@ chip soc/intel/alderlake
|
||||||
.clk_req = 0,
|
.clk_req = 0,
|
||||||
.clk_src = 0,
|
.clk_src = 0,
|
||||||
.flags = PCIE_RP_LTR | PCIE_RP_AER,
|
.flags = PCIE_RP_LTR | PCIE_RP_AER,
|
||||||
.pcie_rp_aspm = ASPM_L0S,
|
|
||||||
}"
|
}"
|
||||||
device pci 00.0 alias dgpu on end
|
device pci 00.0 alias dgpu on end
|
||||||
end
|
end
|
||||||
|
|
Loading…
Reference in New Issue