mb/google/volteer/var/terrador: Configure board specific DPTF parameters
Configure board specific DPTF parameters for terrador and todor BUG=b:171019363,b:170699797 BRANCH=volteer TEST=build and verify by thermal team Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Change-Id: I19935ca98ec7a078869e73d65ea471df70f37121 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46487 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -17,6 +17,49 @@ chip soc/intel/tigerlake
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register "SaGv" = "SaGv_Disabled"
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device domain 0 on
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device ref dptf on
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chip drivers/intel/dptf
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## Passive Policy
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, CPU, 85, 1000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 65, 6000),
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[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_0, 65, 6000),
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[3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 65, 6000),
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[4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 65, 6000)}"
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## Critical Policy
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 100, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 75, SHUTDOWN),
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[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 75, SHUTDOWN),
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[4] = DPTF_CRITICAL(TEMP_SENSOR_3, 75, SHUTDOWN)}"
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## Power Limits Control
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# 3-9W PL1 in 200mW increments, avg over 28-32s interval
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# PL2 ranges from 9 to 40W, avg over 28-32s interval
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register "controls.power_limits" = "{
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.pl1 = {.min_power = 3000,
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.max_power = 9000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,},
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.pl2 = {.min_power = 9000,
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.max_power = 40000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,}}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf" = "{
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[0] = { 255, 1700 },
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[1] = { 24, 1500 },
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[2] = { 16, 1000 },
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[3] = { 8, 500 }}"
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device generic 0 on end
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end
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end
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device ref i2c0 on
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chip drivers/i2c/generic
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register "hid" = ""10EC5682""
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@ -17,6 +17,49 @@ chip soc/intel/tigerlake
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register "SaGv" = "SaGv_Disabled"
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device domain 0 on
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device ref dptf on
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chip drivers/intel/dptf
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## Passive Policy
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, CPU, 85, 1000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 65, 6000),
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[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_0, 65, 6000),
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[3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 65, 6000),
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[4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 65, 6000)}"
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## Critical Policy
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 100, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 75, SHUTDOWN),
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[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 75, SHUTDOWN),
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[4] = DPTF_CRITICAL(TEMP_SENSOR_3, 75, SHUTDOWN)}"
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## Power Limits Control
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# 3-9W PL1 in 200mW increments, avg over 28-32s interval
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# PL2 ranges from 9 to 40W, avg over 28-32s interval
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register "controls.power_limits" = "{
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.pl1 = {.min_power = 3000,
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.max_power = 9000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,},
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.pl2 = {.min_power = 9000,
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.max_power = 40000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,}}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf" = "{
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[0] = { 255, 1700 },
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[1] = { 24, 1500 },
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[2] = { 16, 1000 },
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[3] = { 8, 500 }}"
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device generic 0 on end
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end
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end
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device ref i2c0 on
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chip drivers/i2c/generic
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register "hid" = ""10EC5682""
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