nb/amd: Deduplicate nb_common.h

Save for the IO_APIC2_ADDR definition, they are equivalent.

Change-Id: I14da3d9aeefcc725428957ce0c9ac164eabacec6
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47408
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/pcengines/apu2/mptable.c

@@ -3,7 +3,7 @@
 #include <arch/smp/mpspec.h>
 #include <arch/ioapic.h>
 #include <stdint.h>
-#include <northbridge/amd/pi/nb_common.h>
+#include <northbridge/amd/nb_common.h>
 #include <southbridge/amd/common/amd_pci_util.h>
 
 static void *smp_write_config_table(void *v)

src/northbridge/amd/agesa/family14/northbridge.c

@@ -13,7 +13,7 @@
 #include <cpu/cpu.h>
 #include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>
-#include <northbridge/amd/agesa/nb_common.h>
+#include <northbridge/amd/nb_common.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
 #include <sb_cimx.h>

src/northbridge/amd/agesa/family15tn/northbridge.c

@@ -18,7 +18,7 @@
 #include <Porting.h>
 #include <Options.h>
 #include <Topology.h>
-#include <northbridge/amd/agesa/nb_common.h>
+#include <northbridge/amd/nb_common.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
 

src/northbridge/amd/agesa/family16kb/northbridge.c

@@ -18,7 +18,7 @@
 #include <AGESA.h>
 #include <Options.h>
 #include <Topology.h>
-#include <northbridge/amd/agesa/nb_common.h>
+#include <northbridge/amd/nb_common.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
 

src/northbridge/amd/agesa/nb_common.h

@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef __AMD_NB_COMMON_H__
-#define __AMD_NB_COMMON_H__
-
-#define HT_IO_HOST_ALIGN 4096
-#define HT_MEM_HOST_ALIGN (1024 * 1024)
-
-#define DEV_CDB	0x18
-
-#endif

src/northbridge/amd/pi/00630F01/northbridge.c

@@ -17,7 +17,7 @@
 #include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <acpi/acpigen.h>
-#include <northbridge/amd/pi/nb_common.h>
+#include <northbridge/amd/nb_common.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
 
 #define MAX_NODE_NUMS MAX_NODES

src/northbridge/amd/pi/00730F01/northbridge.c

@@ -21,7 +21,7 @@
 #include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <acpi/acpigen.h>
-#include <northbridge/amd/pi/nb_common.h>
+#include <northbridge/amd/nb_common.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
 #include <southbridge/amd/pi/hudson/pci_devs.h>
 

src/northbridge/amd/pi/00730F01/state_machine.c

@@ -8,7 +8,7 @@
 #include <device/device.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
-#include <northbridge/amd/pi/nb_common.h>
+#include <northbridge/amd/nb_common.h>
 
 void platform_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
 {