diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
index 7f74d6d6fd..a6894eefa4 100644
--- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
@@ -47,6 +47,12 @@ chip soc/amd/sabrina
 	register "i2c_pad[2].rx_level" = "I2C_PAD_RX_1_8V" # Audio/SAR
 	register "i2c_pad[3].rx_level" = "I2C_PAD_RX_1_8V" # GSC
 
+	# general purpose PCIe clock output configuration
+	register "gpp_clk_config[0]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[1]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[2]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[3]" = "GPP_CLK_OFF"
+
 	register "pspp_policy" = "DXIO_PSPP_DISABLED" # TODO: reenable when PSPP works
 
 	device domain 0 on