xeon_sp/cpx: Enable PCH thermal device via FSP
Tested=On OCP Delta Lake, OpenBMC sensor-util can see PCH Temp readings. Change-Id: I39d0d0a982476f9fece51cfa19dcbd0da5dea690 Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44075 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -92,6 +92,8 @@
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#define XHCI_BUS_NUMBER 0x0
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#define XHCI_BUS_NUMBER 0x0
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#define PCH_DEV_SLOT_XHCI 0x14
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#define PCH_DEV_SLOT_XHCI 0x14
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#define PCH_DEVFN_THERMAL _PCH_DEVFN(XHCI, 2)
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#define XHCI_FUNC_NUM 0x0
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#define XHCI_FUNC_NUM 0x0
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#define HPET_BUS_NUM 0x0
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#define HPET_BUS_NUM 0x0
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@ -3,6 +3,7 @@
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#include <arch/romstage.h>
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#include <arch/romstage.h>
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#include <fsp/api.h>
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#include <fsp/api.h>
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#include <soc/romstage.h>
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#include <soc/romstage.h>
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#include <soc/pci_devs.h>
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#include "chip.h"
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#include "chip.h"
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void __weak mainboard_memory_init_params(FSPM_UPD *mupd)
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void __weak mainboard_memory_init_params(FSPM_UPD *mupd)
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@ -13,6 +14,7 @@ void __weak mainboard_memory_init_params(FSPM_UPD *mupd)
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void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
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void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
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{
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{
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FSPM_CONFIG *m_cfg = &mupd->FspmConfig;
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FSPM_CONFIG *m_cfg = &mupd->FspmConfig;
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const struct device *dev;
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/* ErrorLevel - 0 (disable) to 8 (verbose) */
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/* ErrorLevel - 0 (disable) to 8 (verbose) */
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m_cfg->DebugPrintLevel = 8;
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m_cfg->DebugPrintLevel = 8;
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@ -61,5 +63,10 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
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m_cfg->PEXPHIDE = 0x0;
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m_cfg->PEXPHIDE = 0x0;
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m_cfg->HidePEXPMenu = 0x0;
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m_cfg->HidePEXPMenu = 0x0;
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/* Enable PCH thermal device in FSP, the definition of ThermalDeviceEnable is
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0: Disable, 1: Enabled in PCI mode, 2: Enabled in ACPI mode */
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dev = pcidev_path_on_root(PCH_DEVFN_THERMAL);
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m_cfg->ThermalDeviceEnable = dev && dev->enabled;
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mainboard_memory_init_params(mupd);
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mainboard_memory_init_params(mupd);
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}
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}
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