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spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions. 

They were only used internal to the SPI drivers and, according to the comment
next to their prototypes, were for when the SPI controller doesn't control the
chip select line directly and needs some help.

BUG=None
TEST=Built for link, falco, and rambi. Built and booted on peach_pit and nyan.
BRANCH=None

Original-Change-Id: If4622819a4437490797d305786e2436e2e70c42b
Original-Signed-off-by: Gabe Black <gabeblack@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/192048
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Gabe Black <gabeblack@chromium.org>
Original-Commit-Queue: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 1e2deecd9d8c6fd690c54f24e902cc7d2bab0521)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ida08cbc2be5ad09b929ca16e483c36c49ac12627
Reviewed-on: http://review.coreboot.org/7708
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Gabe Black 2014-03-27 21:26:46 -07:00 committed by Marc Jones
parent 87f3b4ea01
commit ec9293fb5a
9 changed files with 10 additions and 103 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
src/include/spi-generic.h
View File

@ -117,23 +117,6 @@ int spi_xfer(struct spi_slave *slave, const void *dout, unsigned int bytesout,
void *din, unsigned int bytesin);
/*-----------------------------------------------------------------------
* Activate a SPI chipselect.
* This function is provided by the board code when using a driver
* that can't control its chipselects automatically (e.g.
* common/soft_spi.c). When called, it should activate the chip select
* to the device identified by "slave".
*/
void spi_cs_activate(struct spi_slave *slave);
/*-----------------------------------------------------------------------
* Deactivate a SPI chipselect.
* This function is provided by the board code when using a driver
* that can't control its chipselects automatically (e.g.
* common/soft_spi.c). When called, it should deactivate the chip
* select to the device identified by "slave".
*/
void spi_cs_deactivate(struct spi_slave *slave);
unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len);

10
src/soc/intel/baytrail/spi.c
View File

@ -327,16 +327,6 @@ void spi_release_bus(struct spi_slave *slave)
/* Handled by ICH automatically. */
}
void spi_cs_activate(struct spi_slave *slave)
{
/* Handled by ICH automatically. */
}
void spi_cs_deactivate(struct spi_slave *slave)
{
/* Handled by ICH automatically. */
}
typedef struct spi_transaction {
const uint8_t *out;
uint32_t bytesout;

10
src/soc/intel/fsp_baytrail/spi.c
View File

@ -325,16 +325,6 @@ void spi_release_bus(struct spi_slave *slave)
/* Handled by ICH automatically. */
}
void spi_cs_activate(struct spi_slave *slave)
{
/* Handled by ICH automatically. */
}
void spi_cs_deactivate(struct spi_slave *slave)
{
/* Handled by ICH automatically. */
}
typedef struct spi_transaction {
const uint8_t *out;
uint32_t bytesout;

24
src/soc/nvidia/tegra124/spi.c
View File

@ -212,11 +212,13 @@ static unsigned int tegra_spi_speed(unsigned int bus)
return 50000000;
}
void spi_cs_activate(struct spi_slave *slave)
int spi_claim_bus(struct spi_slave *slave)
{
struct tegra_spi_regs *regs = to_tegra_spi(slave->bus)->regs;
u32 val;
tegra_spi_init(slave->bus);
val = read32(&regs->command1);
/* select appropriate chip-select line */
@ -230,9 +232,10 @@ void spi_cs_activate(struct spi_slave *slave)
val |= SPI_CMD1_CS_SW_VAL;
write32(val, &regs->command1);
return 0;
}
void spi_cs_deactivate(struct spi_slave *slave)
void spi_release_bus(struct spi_slave *slave)
{
struct tegra_spi_regs *regs = to_tegra_spi(slave->bus)->regs;
u32 val;
@ -848,8 +851,7 @@ static size_t tegra_spi_cbfs_read(struct cbfs_media *media, void *dest,
spi_read_cmd[2] = (offset >> 8) & 0xff;
spi_read_cmd[3] = offset & 0xff;
/* assert /CS */
spi_cs_activate(spi->slave);
spi_claim_bus(spi->slave);
if (spi_xfer(spi->slave, spi_read_cmd,
read_cmd_bytes, NULL, 0) < 0) {
@ -872,7 +874,7 @@ static size_t tegra_spi_cbfs_read(struct cbfs_media *media, void *dest,
tegra_spi_cbfs_read_exit:
/* de-assert /CS */
spi_cs_deactivate(spi->slave);
spi_release_bus(spi->slave);
return (ret < 0) ? 0 : ret;
}
@ -933,15 +935,3 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
return &channel->slave;
}
int spi_claim_bus(struct spi_slave *slave)
{
tegra_spi_init(slave->bus);
spi_cs_activate(slave);
return 0;
}
void spi_release_bus(struct spi_slave *slave)
{
spi_cs_deactivate(slave);
}

16
src/soc/samsung/exynos5420/spi.c
View File

@ -133,22 +133,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
return &eslave->slave;
}
void spi_cs_activate(struct spi_slave *slave)
int spi_claim_bus(struct spi_slave *slave)
{
struct exynos_spi *regs = to_exynos_spi(slave)->regs;
// TODO(hungte) Add some delay if too many transactions happen at once.
clrbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT);
}
void spi_cs_deactivate(struct spi_slave *slave)
{
struct exynos_spi *regs = to_exynos_spi(slave)->regs;
setbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT);
}
int spi_claim_bus(struct spi_slave *slave)
{
spi_cs_activate(slave);
return 0;
}
@ -231,7 +220,8 @@ int spi_xfer(struct spi_slave *slave, const void *dout, unsigned int bytes_out,
void spi_release_bus(struct spi_slave *slave)
{
spi_cs_deactivate(slave);
struct exynos_spi *regs = to_exynos_spi(slave)->regs;
setbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT);
}
static int exynos_spi_read(struct spi_slave *slave, void *dest, uint32_t len,

8
src/southbridge/amd/agesa/hudson/spi.c
View File

@ -182,14 +182,6 @@ void spi_release_bus(struct spi_slave *slave)
#endif
}
void spi_cs_activate(struct spi_slave *slave)
{
}
void spi_cs_deactivate(struct spi_slave *slave)
{
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
struct spi_slave *slave = malloc(sizeof(*slave));

8
src/southbridge/amd/cimx/sb800/spi.c
View File

@ -174,14 +174,6 @@ void spi_release_bus(struct spi_slave *slave)
#endif
}
void spi_cs_activate(struct spi_slave *slave)
{
}
void spi_cs_deactivate(struct spi_slave *slave)
{
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
struct spi_slave *slave = malloc(sizeof(*slave));

10
src/southbridge/intel/common/spi.c
View File

@ -371,16 +371,6 @@ void spi_release_bus(struct spi_slave *slave)
/* Handled by ICH automatically. */
}
void spi_cs_activate(struct spi_slave *slave)
{
/* Handled by ICH automatically. */
}
void spi_cs_deactivate(struct spi_slave *slave)
{
/* Handled by ICH automatically. */
}
typedef struct spi_transaction {
const uint8_t *out;
uint32_t bytesout;

10
src/southbridge/intel/fsp_rangeley/spi.c
View File

@ -447,16 +447,6 @@ void spi_release_bus(struct spi_slave *slave)
/* Handled by ICH automatically. */
}
void spi_cs_activate(struct spi_slave *slave)
{
/* Handled by ICH automatically. */
}
void spi_cs_deactivate(struct spi_slave *slave)
{
/* Handled by ICH automatically. */
}
typedef struct spi_transaction {
const uint8_t *out;
uint32_t bytesout;