GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

cpu/x86: Add 1GiB pages for memory access up to 512GiB 

Current pagetable implementation allows memory access up to 4GiB using
2MiB pages. If user wants to access more than 4GiB with a 2MiB page it
will require more pagetable entries. By using a 1GiB page table, users
can access more than 4GiB of memory while reducing the number of
pagetable entries. This patch enables memory access up to 512GiB through
1GiB pages by selecting USE_1G_PAGES_TLB in Kconfig.

TEST: Verified in 64bit mode boot and access above 4GiB

Change-Id: Id569ae5b50abf5b72e4db33b5e4cd802399e76ec
Signed-off-by: Ashish Kumar Mishra <ashish.k.mishra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80088
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Ashish Kumar Mishra 2024-01-16 16:23:03 +05:30 committed by Felix Held
parent 32ebaef73c
commit ecbc243a45
3 changed files with 43 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/cpu/x86/64bit/Makefile.mk
View File

@ -3,8 +3,14 @@
all_x86-y += mode_switch.S
all_x86-y += mode_switch2.S
ifeq ($(CONFIG_USE_1G_PAGETABLES),y)
PAGETABLE_SRC := pt1G.S
else
PAGETABLE_SRC := pt.S
endif
# Add --defsym=_start=0 to suppress a linker warning.
$(objcbfs)/pt: $(dir)/pt.S $(obj)/config.h
$(objcbfs)/pt: $(dir)/$(PAGETABLE_SRC) $(obj)/config.h
$(CC_bootblock) $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) -o $@.tmp $< -Wl,--section-start=.rodata=$(CONFIG_ARCH_X86_64_PGTBL_LOC),--defsym=_start=0
$(OBJCOPY_ramstage) -Obinary -j .rodata $@.tmp $@
rm $@.tmp

29
src/cpu/x86/64bit/pt1G.S Normal file
View File

@ -0,0 +1,29 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* For reference see "AMD64 Architecture Programmer's Manual Volume 2",
* Document 24593-Rev. 3.31-July 2019 Chapter 5.3.4
*
* Page table attributes: WB, User+Supervisor, Present, Writeable, Accessed, Dirty
*/
.section .rodata
#define _PRES (1ULL << 0)
#define _RW (1ULL << 1)
#define _US (1ULL << 2)
#define _A (1ULL << 5)
#define _D (1ULL << 6)
#define _PS (1ULL << 7)
#define _GEN_DIR(a) (_PRES + _RW + _US + _A + (a))
#define _GEN_PAGE(a) (_PRES + _RW + _US + _PS + _A + _D + (a))
.global PM4LE
.align 4096
PM4LE:
.quad _GEN_DIR(PDE_table)
.align 4096
PDE_table: /* identity map 1GiB pages * 512 */
.rept 512
.quad _GEN_PAGE(0x40000000 * ((. - PDE_table) >> 3))
.endr

7
src/cpu/x86/Kconfig
View File

@ -150,6 +150,13 @@ config NO_SMM
bool
default n
config USE_1G_PAGES_TLB
bool
default n
help
Select this option to enable access to up to 512 GiB of memory
by using 1 GiB large pages.
config SMM_ASEG
bool
default n