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mb/intel/tglrvp: Enable USB4 resources using SoC Kconfig 

This change uses the newly added `SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES`
Kconfig to enable USB4 resources and drops the configuration
in mainboard.

Change-Id: I707c5d63ea8c58e72126fe0d319ba81a99221ba5
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57127
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Furquan Shaikh 2021-08-24 13:47:00 -07:00
parent 2306ee36f0
commit ecc459301f
1 changed files with 1 additions and 15 deletions
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16
src/mainboard/intel/tglrvp/Kconfig
View File

@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_INTEL_CSE_LITE_SKU
select MAINBOARD_HAS_TPM2
select MAINBOARD_HAS_SPI_TPM_CR50
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
select SPI_TPM
config CHROMEOS
@ -53,21 +54,6 @@ config MAINBOARD_FAMILY
string
default "Intel_tglrvp"
config PCIEXP_HOTPLUG
default y
config PCIEXP_HOTPLUG_BUSES
int
default 42
config PCIEXP_HOTPLUG_MEM
hex
default 0xc200000 # 194 MiB
config PCIEXP_HOTPLUG_PREFETCH_MEM
hex
default 0x1c00000 # 448 MiB
config DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"