diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 562e7f2efc..5c5f41ad4a 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -357,11 +357,21 @@ static void disable_peg(void)
 		printk(BIOS_DEBUG, "Disabling IGD.\n");
 		reg &= ~DEVEN_IGD;
 	}
+	dev = dev_find_slot(0, PCI_DEVFN(4, 0));
+	if (!dev || !dev->enabled) {
+		printk(BIOS_DEBUG, "Disabling Device 4.\n");
+		reg &= ~DEVEN_D4EN;
+	}
 	dev = dev_find_slot(0, PCI_DEVFN(6, 0));
 	if (!dev || !dev->enabled) {
 		printk(BIOS_DEBUG, "Disabling PEG60.\n");
 		reg &= ~DEVEN_PEG60;
 	}
+	dev = dev_find_slot(0, PCI_DEVFN(7, 0));
+	if (!dev || !dev->enabled) {
+		printk(BIOS_DEBUG, "Disabling Device 7.\n");
+		reg &= ~DEVEN_D7EN;
+	}
 
 	dev = dev_find_slot(0, PCI_DEVFN(0, 0));
 	pci_write_config32(dev, DEVEN, reg);
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 8d2ae852e5..bc659be075 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -75,7 +75,9 @@
 #define GGC		0x50			/* GMCH Graphics Control */
 
 #define DEVEN		0x54			/* Device Enable */
+#define  DEVEN_D7EN	(1 << 14)
 #define  DEVEN_PEG60	(1 << 13)
+#define  DEVEN_D4EN	(1 << 7)
 #define  DEVEN_IGD	(1 << 4)
 #define  DEVEN_PEG10	(1 << 3)
 #define  DEVEN_PEG11	(1 << 2)