soc/intel/cannonlake: Use EBDA structure to store soc reserve memory size
Avoid calling calculate_dram_base() function to get chipset reserved memory size during pci resource allocation. Rather use EBDA to store chipset reserved memory size while calling cbmem_top_int(). This patch avoids one extra calculate_dram_base() call. BRANCH=none BUG=b:63974384 TEST=Ensures DRAM based resource allocation has taken care of Intel SoC reserved ranges. Change-Id: I2771ea55253ca7d16cd2e2951889ab092b47a9b1 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/22099 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -19,6 +19,7 @@
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struct ebda_config {
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uint32_t signature; /* 0x00 - EBDA signature */
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uint32_t tolum_base; /* 0x04 - coreboot memory start */
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uint32_t reserved_mem_size; /* 0x08 - chipset reserved memory size */
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};
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#endif
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@ -263,12 +263,12 @@ static uintptr_t calculate_dram_base(size_t *reserved_mem_size)
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*/
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size_t soc_reserved_mmio_size(void)
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{
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size_t chipset_mem_size;
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struct ebda_config cfg;
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calculate_dram_base(&chipset_mem_size);
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retrieve_ebda_object(&cfg);
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/* Get Intel Reserved Memory Range Size */
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return chipset_mem_size;
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return cfg.reserved_mem_size;
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}
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/* Fill up memory layout information */
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@ -277,6 +277,7 @@ void fill_soc_memmap_ebda(struct ebda_config *cfg)
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size_t chipset_mem_size;
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cfg->tolum_base = calculate_dram_base(&chipset_mem_size);
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cfg->reserved_mem_size = chipset_mem_size;
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}
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void cbmem_top_init(void)
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