mb/asus/p8h61-m_lx: Transform into variant setup

Handle some differences in the DSDT code using preprocessor.

Tested with BUILD_TIMELESS=1, coreboot.rom for the Asus P8H61-M LX
remains identical when not adding the .config file in it.

Change-Id: I2a02f32dfd9fa9c1adce3baf0d279ea19db5883f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54375
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>

MAINTAINERS

@@ -176,6 +176,7 @@ F:	src/mainboard/asus/am1i-a/
 
 ASUS H61 SERIES MAINBOARDS
 M:	Angel Pons <th3fanbus@gmail.com>
+M:	Tristan Corrick <tristan@corrick.kiwi>
 S:	Maintained
 F:	src/mainboard/asus/h61-series/
 
@@ -195,11 +196,6 @@ M:	Angel Pons <th3fanbus@gmail.com>
 S:	Maintained
 F:	src/mainboard/asus/p5qpl-am/
 
-ASUS P8H61-M LX MAINBOARD
-M:	Tristan Corrick <tristan@corrick.kiwi>
-S:	Maintained
-F:	src/mainboard/asus/p8h61-m_lx/
-
 ASUS P8Z77-M PRO MAINBOARD
 M:	Vlado Cibic <vladocb@protonmail.com>
 S:	Maintained

src/mainboard/asus/h61-series/Kconfig

@@ -20,12 +20,14 @@ config MAINBOARD_DIR
 config VARIANT_DIR
 	string
 	default "h61m-cs"          if BOARD_ASUS_H61M_CS
+	default "p8h61-m_lx"       if BOARD_ASUS_P8H61_M_LX
 	default "p8h61-m_lx3_r2_0" if BOARD_ASUS_P8H61_M_LX3_R2_0
 	default "p8h61-m_pro"      if BOARD_ASUS_P8H61_M_PRO
 
 config MAINBOARD_PART_NUMBER
 	string
 	default "H61M-CS"          if BOARD_ASUS_H61M_CS
+	default "P8H61-M LX"       if BOARD_ASUS_P8H61_M_LX
 	default "P8H61-M LX3 R2.0" if BOARD_ASUS_P8H61_M_LX3_R2_0
 	default "P8H61-M PRO"      if BOARD_ASUS_P8H61_M_PRO
 
@@ -39,4 +41,14 @@ config CMOS_DEFAULT_FILE
 config CMOS_LAYOUT_FILE
 	default "src/mainboard/\$(MAINBOARDDIR)/variants/\$(CONFIG_VARIANT_DIR)/cmos.layout"
 
+#
+# These ME partitions need to be whitelisted for correct system
+# operation. Example issues from removing them include: no serial output
+# and kernel warnings about loading audio codecs.
+#
+config ME_CLEANER_ARGS
+	string
+	depends on USE_ME_CLEANER
+	default "-S --whitelist EFFS,FCRS" if BOARD_ASUS_P8H61_M_LX
+
 endif

src/mainboard/asus/h61-series/Kconfig.name

@@ -8,6 +8,18 @@ config BOARD_ASUS_H61M_CS
 	select NO_UART_ON_SUPERIO
 	select SUPERIO_NUVOTON_NCT6779D
 
+config BOARD_ASUS_P8H61_M_LX
+	bool "P8H61-M LX"
+	select BOARD_ASUS_H61_SERIES
+	select BOARD_ROMSIZE_KB_4096
+	select HAVE_CMOS_DEFAULT
+	select HAVE_OPTION_TABLE
+	select INTEL_INT15
+	select REALTEK_8168_RESET
+	select RT8168_SET_LED_MODE
+	select SUPERIO_NUVOTON_COMMON_COM_A
+	select SUPERIO_NUVOTON_NCT6776
+
 config BOARD_ASUS_P8H61_M_LX3_R2_0
 	bool "P8H61-M LX3 R2.0"
 	select BOARD_ASUS_H61_SERIES

src/mainboard/asus/h61-series/acpi/superio.asl

@@ -1,3 +1,18 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
+#if CONFIG(BOARD_ASUS_P8H61_M_LX)
+
+#define SUPERIO_DEV		SIO0
+#define SUPERIO_PNP_BASE	0x2e
+#define NCT6776_SHOW_PP
+#define NCT6776_SHOW_SP1
+#define NCT6776_SHOW_KBC
+#define NCT6776_SHOW_HWM
+
+#undef NCT6776_SHOW_GPIO
+
+#include <superio/nuvoton/nct6776/acpi/superio.asl>
+
+#else /* !BOARD_ASUS_P8H61_M_LX */
 #include <drivers/pc80/pc/ps2_controller.asl>
+#endif

src/mainboard/asus/h61-series/dsdt.asl

@@ -2,13 +2,19 @@
 
 #include <acpi/acpi.h>
 
+#if CONFIG(BOARD_ASUS_P8H61_M_LX)
+#define BOARD_DSDT_REVISION 0x20171231	/* OEM revision */
+#else
+#define BOARD_DSDT_REVISION 0x20141018
+#endif
+
 DefinitionBlock(
 	"dsdt.aml",
 	"DSDT",
 	ACPI_DSDT_REV_2,
 	OEM_ID,
 	ACPI_TABLE_CREATOR,
-	0x20141018	/* OEM revision */
+	BOARD_DSDT_REVISION
 )
 {
 	#include <acpi/dsdt_top.asl>

src/mainboard/asus/p8h61-m_lx/Kconfig

@@ -1,42 +0,0 @@
-## SPDX-License-Identifier: GPL-2.0-or-later
-
-if BOARD_ASUS_P8H61_M_LX
-
-config BOARD_SPECIFIC_OPTIONS
-	def_bool y
-	select BOARD_ROMSIZE_KB_4096
-	select HAVE_ACPI_RESUME
-	select HAVE_ACPI_TABLES
-	select HAVE_CMOS_DEFAULT
-	select HAVE_OPTION_TABLE
-	select INTEL_GMA_HAVE_VBT
-	select INTEL_INT15
-	select MAINBOARD_HAS_LIBGFXINIT
-	select NORTHBRIDGE_INTEL_SANDYBRIDGE
-	select REALTEK_8168_RESET
-	select RT8168_SET_LED_MODE
-	select SERIRQ_CONTINUOUS_MODE
-	select SOUTHBRIDGE_INTEL_BD82X6X
-	select SUPERIO_NUVOTON_COMMON_COM_A
-	select SUPERIO_NUVOTON_NCT6776
-	select USE_NATIVE_RAMINIT
-
-config MAINBOARD_DIR
-	string
-	default "asus/p8h61-m_lx"
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "P8H61-M LX"
-
-#
-# These ME partitions need to be whitelisted for correct system
-# operation. Example issues from removing them include: no serial output
-# and kernel warnings about loading audio codecs.
-#
-config ME_CLEANER_ARGS
-	string
-	depends on USE_ME_CLEANER
-	default "-S --whitelist EFFS,FCRS"
-
-endif

src/mainboard/asus/p8h61-m_lx/Kconfig.name

@@ -1,2 +0,0 @@
-config BOARD_ASUS_P8H61_M_LX
-	bool "P8H61-M LX"

src/mainboard/asus/p8h61-m_lx/Makefile.inc

@@ -1,7 +0,0 @@
-## SPDX-License-Identifier: GPL-2.0-or-later
-
-bootblock-y += gpio.c
-romstage-y += gpio.c
-ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-bootblock-y += early_init.c
-romstage-y += early_init.c

src/mainboard/asus/p8h61-m_lx/acpi/platform.asl

@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-Method(_PTS,1)
-{
-}
-
-Method(_WAK,1)
-{
-	Return(Package(){0,0})
-}

src/mainboard/asus/p8h61-m_lx/acpi/superio.asl

@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-#define SUPERIO_DEV		SIO0
-#define SUPERIO_PNP_BASE	0x2e
-#define NCT6776_SHOW_PP
-#define NCT6776_SHOW_SP1
-#define NCT6776_SHOW_KBC
-#define NCT6776_SHOW_HWM
-
-#undef NCT6776_SHOW_GPIO
-
-#include <superio/nuvoton/nct6776/acpi/superio.asl>

src/mainboard/asus/p8h61-m_lx/dsdt.asl

@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-#include <acpi/acpi.h>
-DefinitionBlock(
-	"dsdt.aml",
-	"DSDT",
-	ACPI_DSDT_REV_2,
-	OEM_ID,
-	ACPI_TABLE_CREATOR,
-	0x20171231	/* OEM Revision */
-)
-{
-	#include <acpi/dsdt_top.asl>
-	#include "acpi/platform.asl"
-	#include <cpu/intel/common/acpi/cpu.asl>
-	#include <southbridge/intel/common/acpi/platform.asl>
-	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/common/acpi/sleepstates.asl>
-
-	Device (\_SB.PCI0)
-	{
-		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
-	}
-}

src/mainboard/asus/p8h61-m_lx/mainboard.c

@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-#include <device/device.h>
-#include <drivers/intel/gma/int15.h>
-
-static void mainboard_enable(struct device *dev)
-{
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,
-					GMA_INT15_PANEL_FIT_DEFAULT,
-					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-}
-
-struct chip_operations mainboard_ops = {
-	.enable_dev = mainboard_enable,
-};