soc/mediatek/mt8188: Fix USB2 detection issue

MT8188 supports port0/port1 download. The hardware needs a trapping pin
to select the port to use. When port1 is selected, the phy of port1 will
be switched to port0. That is, port1 connector will be the physical line
of port0. Since port0 phy isn't initialized in coreboot, switch back to
port1 phy.

BUG=b:269059211
TEST=can detect USB2 devices in depthcharge.

Change-Id: Ic97d0bd9d0233883196b2e73ac2a22cd8ea9466b
Signed-off-by: Shaocheng Wang <shaocheng.wang@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73170
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
This commit is contained in:
Shaocheng Wang 2023-02-17 15:42:25 +08:00 committed by Rex-BC Chen
parent 8b4154c1d2
commit ed2b6a5a17
1 changed files with 15 additions and 0 deletions

View File

@ -11,7 +11,22 @@
#include <soc/pll_common.h>
#include <soc/usb.h>
#define TRAP_USB20_P1_USBD1_EN 0x10005600
static void mt_set_trapping_pin(void)
{
/*
* MT8188 supports port0/port1 download. The hardware needs a trapping pin to
* select the port to use. When port1 is selected, the phy of port1 will be
* switched to port0. That is, port1 connector will be the physical line of
* port0. Since port0 phy isn't initialized in coreboot, switch back to port1
* phy.
*/
setbits32p(TRAP_USB20_P1_USBD1_EN, BIT(9));
}
void mtk_usb_prepare(void)
{
mt_pll_set_usb_clock();
mt_set_trapping_pin();
}