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Add detection/dump support for the NSC PC87382. 

It is a rather small 'Super I/O' device, containing a serial port, IR,
GPIO, and a Docking LPC switch. It is used in various Thinkpads.

Add 0x164e/0x16ef to the list of probed ports for NSC chips, as
Thinkpads are using this address pair.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6327 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Sven Schnelle 2011-02-02 23:49:41 +00:00 committed by Uwe Hermann
parent 6f92d21b12
commit ed61c4ad7e
2 changed files with 20 additions and 2 deletions
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20
util/superiotool/nsc.c
View File

@ -305,7 +305,25 @@ static const struct superio_registers reg_table[] = {
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT}, {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
{0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}}, {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
{EOT}}}, {EOT}}},
{0xf4, "PC87382", {
{NOLDN, NULL,
{0x20,0x21,0x22,0x26,0x27,0x29,EOT},
{0xf4,0x11,0x63,0x00,0x00,0x00,EOT}},
{0x02, "IR",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
{0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
{0x03, "COM1",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
{0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
{0x07, "GPIO",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,
0xf2,EOT},
{0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,MISC,
0x01,EOT}},
{0x19, "Docking LPC switch",
{0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
{0x00,0x00,0x00,0x00,0x00,0x04,0x04,EOT}},
{EOT}}},
/* SID[7..0]: family, SRID[7..5]: ID, SRID[4..0]: rev. */ /* SID[7..0]: family, SRID[7..5]: ID, SRID[4..0]: rev. */
{0xea, "PC8739x", { {0xea, "PC8739x", {
{NOLDN, NULL, {NOLDN, NULL,

2
util/superiotool/superiotool.h
View File

@ -223,7 +223,7 @@ static const struct {
{probe_idregs_fintek_alternative, {0x2e, 0x4e, EOT}}, {probe_idregs_fintek_alternative, {0x2e, 0x4e, EOT}},
/* Only use 0x370 for ITE, but 0x3f0 or 0x3bd would also be valid. */ /* Only use 0x370 for ITE, but 0x3f0 or 0x3bd would also be valid. */
{probe_idregs_ite, {0x25e, 0x2e, 0x4e, 0x370, EOT}}, {probe_idregs_ite, {0x25e, 0x2e, 0x4e, 0x370, EOT}},
{probe_idregs_nsc, {0x2e, 0x4e, 0x15c, EOT}}, {probe_idregs_nsc, {0x2e, 0x4e, 0x15c, 0x164e, EOT}},
/* I/O pairs on Nuvoton EC chips can be configured by firmware in /* I/O pairs on Nuvoton EC chips can be configured by firmware in
* addition to the following hardware strapping options. */ * addition to the following hardware strapping options. */
{probe_idregs_nuvoton, {0x164e, 0x2e, EOT}}, {probe_idregs_nuvoton, {0x164e, 0x2e, EOT}},