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soc/amd/sabrina/Kconfig: set soft fuse bit 34 

The bits are documented in NDA document #55758.

BUG=b:228458221

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ibc27f617ca9c9620b3b2cb0837b661fa0cd36c2b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65312
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held 2022-06-22 15:09:23 +02:00 committed by Marshall Dawson
parent c3566b67f6
commit ed69450d62
1 changed files with 1 additions and 1 deletions
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src/soc/amd/sabrina/Kconfig
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@ -403,7 +403,7 @@ config SPL_TABLE_FILE
config PSP_SOFTFUSE_BITS config PSP_SOFTFUSE_BITS
string "PSP Soft Fuse bits to enable" string "PSP Soft Fuse bits to enable"
default "28 6" default "34 28 6"
help help
Space separated list of Soft Fuse bits to enable. Space separated list of Soft Fuse bits to enable.
Bit 0: Enable secure debug (Set by PSP_UNLOCK_SECURE_DEBUG) Bit 0: Enable secure debug (Set by PSP_UNLOCK_SECURE_DEBUG)