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mb/google/reef: Remove unused DPTF_CPU_ACTIVE_ACx defines 

ApolloLake based reef platform is fan-less design. We do not need
these DPTF_CPU_ACTIVE_ACx defines. Removing these from all reef
variants as those are not being used.

Change-Id: Id3cb7f7826a5e02cf447c70ab5cdc9b5d86982ca
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/26468
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sumeet Pawnikar 2018-05-21 22:18:56 +05:30 committed by Patrick Georgi
parent 2526fd4a3d
commit ed70c18975
4 changed files with 0 additions and 20 deletions
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5
src/mainboard/google/reef/variants/baseboard/include/baseboard/acpi/dptf.asl
View File

@ -16,11 +16,6 @@
#define DPTF_CPU_PASSIVE 95
#define DPTF_CPU_CRITICAL 105
#define DPTF_CPU_ACTIVE_AC0 90
#define DPTF_CPU_ACTIVE_AC1 80
#define DPTF_CPU_ACTIVE_AC2 70
#define DPTF_CPU_ACTIVE_AC3 60
#define DPTF_CPU_ACTIVE_AC4 50
#define DPTF_TSR0_SENSOR_ID 0
#define DPTF_TSR0_SENSOR_NAME "Battery"

5
src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl
View File

@ -16,11 +16,6 @@
#define DPTF_CPU_PASSIVE 80
#define DPTF_CPU_CRITICAL 90
#define DPTF_CPU_ACTIVE_AC0 90
#define DPTF_CPU_ACTIVE_AC1 80
#define DPTF_CPU_ACTIVE_AC2 70
#define DPTF_CPU_ACTIVE_AC3 60
#define DPTF_CPU_ACTIVE_AC4 50
#define DPTF_TSR0_SENSOR_ID 0
#define DPTF_TSR0_SENSOR_NAME "Battery"

5
src/mainboard/google/reef/variants/sand/include/variant/acpi/dptf.asl
View File

@ -16,11 +16,6 @@
#define DPTF_CPU_PASSIVE 83
#define DPTF_CPU_CRITICAL 99
#define DPTF_CPU_ACTIVE_AC0 90
#define DPTF_CPU_ACTIVE_AC1 80
#define DPTF_CPU_ACTIVE_AC2 70
#define DPTF_CPU_ACTIVE_AC3 60
#define DPTF_CPU_ACTIVE_AC4 50
#define DPTF_TSR0_SENSOR_ID 0
#define DPTF_TSR0_SENSOR_NAME "Battery"

5
src/mainboard/google/reef/variants/snappy/include/variant/acpi/dptf.asl
View File

@ -16,11 +16,6 @@
#define DPTF_CPU_PASSIVE 100
#define DPTF_CPU_CRITICAL 105
#define DPTF_CPU_ACTIVE_AC0 90
#define DPTF_CPU_ACTIVE_AC1 80
#define DPTF_CPU_ACTIVE_AC2 70
#define DPTF_CPU_ACTIVE_AC3 60
#define DPTF_CPU_ACTIVE_AC4 50
#define DPTF_TSR0_SENSOR_ID 0
#define DPTF_TSR0_SENSOR_NAME "Battery"