mb/siemens/mc_ehl: Disable HECI #2 device

HECI #2 is not used for CSE communication. Therefore, it is not
necessary to set the parameter 'Heci2Enable' in devicetree.

Change-Id: I7012e4d877a464699727ca775af3f9965e0602e9
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58940
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Mario Scheithauer 2021-11-04 10:19:41 +01:00 committed by Felix Held
parent 3b03798953
commit ed784bc0a7
2 changed files with 0 additions and 2 deletions

View File

@ -18,7 +18,6 @@ chip soc/intel/elkhartlake
# FSP configuration
register "SaGv" = "SaGv_Disabled"
register "SmbusEnable" = "1"
register "Heci2Enable" = "1"
# Enable IBECC for the complete memory
register "ibecc" = "{

View File

@ -18,7 +18,6 @@ chip soc/intel/elkhartlake
# FSP configuration
register "SaGv" = "SaGv_Disabled"
register "SmbusEnable" = "1"
register "Heci2Enable" = "1"
# Enable IBECC for the complete memory
register "ibecc" = "{