soc/amd/common/block/smn: add smn_read64
Add smn_read64 which calls smn_read32 twice to read two adjacent 32 bit SMN registers and merges the results into a 64 bit value which it then returns. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ib2d58ec9818559cbefd7b819ae311ad02fafa18f Reviewed-on: https://review.coreboot.org/c/coreboot/+/76552 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
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@ -6,6 +6,7 @@
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#include <types.h>
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#include <types.h>
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uint32_t smn_read32(uint32_t reg);
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uint32_t smn_read32(uint32_t reg);
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uint64_t smn_read64(uint32_t reg);
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void smn_write32(uint32_t reg, uint32_t val);
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void smn_write32(uint32_t reg, uint32_t val);
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#endif /* AMD_BLOCK_SMN_H */
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#endif /* AMD_BLOCK_SMN_H */
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@ -15,6 +15,11 @@ uint32_t smn_read32(uint32_t reg)
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return pci_read_config32(SOC_GNB_DEV, SMN_DATA_ADDR);
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return pci_read_config32(SOC_GNB_DEV, SMN_DATA_ADDR);
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}
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}
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uint64_t smn_read64(uint32_t reg)
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{
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return smn_read32(reg) | (uint64_t)smn_read32(reg + 4) << 32;
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}
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void smn_write32(uint32_t reg, uint32_t val)
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void smn_write32(uint32_t reg, uint32_t val)
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{
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{
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pci_write_config32(SOC_GNB_DEV, SMN_INDEX_ADDR, reg);
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pci_write_config32(SOC_GNB_DEV, SMN_INDEX_ADDR, reg);
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