diff --git a/src/soc/intel/tigerlake/spd/lp4x_spd_manifest.generated.txt b/src/soc/intel/tigerlake/spd/lp4x_spd_manifest.generated.txt index 70877d2c35..c7e969084f 100644 --- a/src/soc/intel/tigerlake/spd/lp4x_spd_manifest.generated.txt +++ b/src/soc/intel/tigerlake/spd/lp4x_spd_manifest.generated.txt @@ -13,3 +13,6 @@ H9HCNNNCPMMLXR-NEE,lp4x-spd-3.hex K4UBE3D4AA-MGCR,lp4x-spd-3.hex MT53E512M64D4NW-046 WT:E,lp4x-spd-1.hex MT53E1G64D8NW-046 WT:E,lp4x-spd-3.hex +H9HCNNNCRMBLPR-NEE,lp4x-spd-1.hex +H9HCNNNFBMBLPR-NEE,lp4x-spd-3.hex +MT53D1G64D4NW-046 WT:A,lp4x-spd-4.hex diff --git a/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt b/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt index 109fadb916..91062d0000 100644 --- a/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt +++ b/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt @@ -181,6 +181,42 @@ "ranksPerChannel": 2, "speedMbps": 4267 } + }, + { + "name": "H9HCNNNCRMBLPR-NEE", + "attribs": { + "densityPerChannelGb": 8, + "banks": 8, + "channelsPerDie": 2, + "diesPerPackage": 2, + "bitWidthPerChannel": 16, + "ranksPerChannel": 1, + "speedMbps": 4267 + } + }, + { + "name": "H9HCNNNFBMBLPR-NEE", + "attribs": { + "densityPerChannelGb": 8, + "banks": 8, + "channelsPerDie": 2, + "diesPerPackage": 4, + "bitWidthPerChannel": 16, + "ranksPerChannel": 2, + "speedMbps": 4267 + } + }, + { + "name": "MT53D1G64D4NW-046 WT:A", + "attribs": { + "densityPerChannelGb": 16, + "banks": 8, + "channelsPerDie": 2, + "diesPerPackage": 2, + "bitWidthPerChannel": 16, + "ranksPerChannel": 1, + "speedMbps": 4267 + } } ] }