inteltool: Add first Skylake PCI IDs
Change-Id: Ia5ef6b04f01e381174a4d8f73ddafeb18d488803 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/19583 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -111,6 +111,7 @@ static const struct {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U,
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"5th generation (Broadwell family) Core Processor ULT" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL, "Bay Trail" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST, "6th generation (Skylake-S/H family) Core Processor (Workstation)" },
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/* Southbridges (LPC controllers) */
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "371AB/EB/MB" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10, "ICH10" },
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@ -198,6 +199,7 @@ static const struct {
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"Wildcat Point Low Power SKU" },
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{ PCI_VENDOR_ID_INTEL, 0x2310, "DH89xxCC" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_LPC, "Bay Trail" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CM236, "CM236" },
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};
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#ifndef __DARWIN__
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@ -136,6 +136,7 @@ static inline uint32_t inl(unsigned port)
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#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE 0x9c45
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#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_PREM 0x9cc3
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#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP 0x9cc5
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#define PCI_DEVICE_ID_INTEL_CM236 0xa150
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#define PCI_DEVICE_ID_INTEL_82810 0x7120
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#define PCI_DEVICE_ID_INTEL_82810_DC 0x7122
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#define PCI_DEVICE_ID_INTEL_82810E_DC 0x7124
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@ -204,6 +205,7 @@ static inline uint32_t inl(unsigned port)
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#define PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_E3 0x0c08 /* Haswell (Xeon E3 v3) */
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#define PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U 0x0a04 /* Haswell-ULT */
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#define PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U 0x1604 /* Broadwell-ULT */
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#define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST 0x1918
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#define ARRAY_SIZE(a) ((int)(sizeof(a) / sizeof((a)[0])))
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