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vendorcode/google: add CHROMEOS_DRAM_PART_NUMBER_IN_CBI Kconfig option

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Add CHROMEOS_DRAM_PART_NUMBER_IN_CBI Kconfig option to declare whether
the SPD Module Part Number (memory part name) is stored in the CBI.

Move mainboard_get_dram_part_num() into src/vendor/google/chromeos
to allow mainboards to use it without having to duplicate that code
by enabling the CHROMEOS_DRAM_PART_NUMBER_IN_CBI config option.

BUG=b:169789558, b:168724473
TEST="emerge-volteer coreboot && emerge-hatch coreboot &&
emerge-dedede coreboot && emerge-nocturne coreboot" and verify it
builds.

Change-Id: I0d393efd0fc731daa70d3990e5b69865be99b78b
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45635
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Nick Vaccaro 2020-09-22 17:15:49 -07:00
parent 3b24bb6fc8
commit edecf46187
3 changed files with 40 additions and 0 deletions
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7
src/vendorcode/google/chromeos/Kconfig
View file

@ -103,5 +103,12 @@ config CHROMEOS_CSE_BOARD_RESET_OVERRIDE
does not understand the new cr50 strap config (applicable only to boards using strap
config 0xe). Enabling this config will help to override the default global reset.
config CHROMEOS_DRAM_PART_NUMBER_IN_CBI
def_bool n
depends on EC_GOOGLE_CHROMEEC
help
Some boards declare the DRAM part number in the CBI instead of the SPD. This option
allows those boards to declare that their DRAM part number is stored in the CBI.
endif # CHROMEOS
endmenu

2
src/vendorcode/google/chromeos/Makefile.inc
View file

@ -16,3 +16,5 @@ bootblock-y += watchdog.c
verstage-y += watchdog.c
romstage-y += watchdog.c
ramstage-y += watchdog.c
romstage-$(CONFIG_CHROMEOS_DRAM_PART_NUMBER_IN_CBI) += dram_part_num_override.c

31
src/vendorcode/google/chromeos/dram_part_num_override.c Normal file
View file

@ -0,0 +1,31 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <memory_info.h>
const char *mainboard_get_dram_part_num(void)
{
static char part_num_store[DIMM_INFO_PART_NUMBER_SIZE];
static enum {
PART_NUM_NOT_READ,
PART_NUM_AVAILABLE,
PART_NUM_NOT_IN_CBI,
} part_num_state = PART_NUM_NOT_READ;
if (part_num_state == PART_NUM_NOT_READ) {
if (google_chromeec_cbi_get_dram_part_num(part_num_store,
sizeof(part_num_store)) < 0) {
printk(BIOS_ERR,
"ERROR: Couldn't obtain DRAM part number from CBI\n");
part_num_state = PART_NUM_NOT_IN_CBI;
} else {
part_num_state = PART_NUM_AVAILABLE;
}
}
if (part_num_state == PART_NUM_NOT_IN_CBI)
return NULL;
return part_num_store;
}