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mb/lenovo/t520: Convert remaining PCI numbers into reference names 

Change-Id: I18ce899516fd38b21ded1e3144aa22e705c534b8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79965
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Singer 2024-01-13 23:01:57 +01:00 committed by Felix Singer
parent f4842bbc14
commit edf122a8cb
3 changed files with 4 additions and 4 deletions
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4
src/mainboard/lenovo/t520/devicetree.cb
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@ -144,8 +144,8 @@ chip northbridge/intel/sandybridge
device i2c 5f on end
end
end # SMBus
device pci 1f.5 off end # IDE controller
device pci 1f.6 off end # Thermal controller
device ref sata2 off end # IDE controller
device ref thermal off end # Thermal controller
end
end
end

2
src/mainboard/lenovo/t520/variants/t520/overridetree.cb
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@ -2,7 +2,7 @@ chip northbridge/intel/sandybridge
register "spd_addresses" = "{0x50, 0, 0x51, 0}"
device domain 0 on
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
device pci 1f.0 on # LPC bridge
device ref lpc on # LPC bridge
chip ec/lenovo/h8
device pnp ff.2 on end # dummy
register "has_wwan_detection" = "1"

2
src/mainboard/lenovo/t520/variants/w520/overridetree.cb
View File

@ -2,7 +2,7 @@ chip northbridge/intel/sandybridge
register "spd_addresses" = "{0x50, 0x52, 0x51, 0x53}"
device domain 0 on
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
device pci 1c.6 on end # PCIe Port #7 USB 3.0
device ref pcie_rp7 on end # PCIe Port #7 USB 3.0
end
end
end