soc/amd/cezanne: add empty SMM-handler
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I95908fac3b1e17a16542e5d80001fac3d22d839a Reviewed-on: https://review.coreboot.org/c/coreboot/+/50455 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -17,6 +17,7 @@ config SOC_SPECIFIC_OPTIONS
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select FSP_COMPRESS_FSP_M_LZMA
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select FSP_COMPRESS_FSP_S_LZMA
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select HAVE_CF9_RESET
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select HAVE_SMI_HANDLER
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select IDT_IN_EVERY_STAGE
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select IOAPIC
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select PLATFORM_USES_FSP2_0
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@ -154,6 +155,19 @@ config CONSOLE_UART_BASE_ADDRESS
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default 0xfedc9000 if UART_FOR_CONSOLE = 0
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default 0xfedca000 if UART_FOR_CONSOLE = 1
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config SMM_TSEG_SIZE
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hex
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default 0x800000 if SMM_TSEG && HAVE_SMI_HANDLER
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default 0x0
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config SMM_RESERVED_SIZE
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hex
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default 0x180000
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config SMM_MODULE_STACK_SIZE
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hex
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default 0x800
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menu "PSP Configuration Options"
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config AMD_FWM_POSITION_INDEX
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@ -4,6 +4,7 @@ ifeq ($(CONFIG_SOC_AMD_CEZANNE),y)
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subdirs-y += ../../../cpu/x86/lapic
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/x86/smm
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# Beware that all-y also adds the compilation unit to verstage on PSP
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all-y += config.c
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@ -34,6 +35,8 @@ ramstage-y += reset.c
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ramstage-y += root_complex.c
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ramstage-y += uart.c
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smm-y += smihandler.c
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CPPFLAGS_common += -I$(src)/soc/amd/cezanne/include
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CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/cezanne
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@ -0,0 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <cpu/x86/smm.h>
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void southbridge_smi_handler(void)
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{
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}
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