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include/cpu/amd: Drop unused files 

Change-Id: Iff14250e52854d598967cfd3cbc98061be06e581
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38055
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS 2020-01-01 21:29:04 +01:00 committed by Patrick Georgi
parent 79ccc69332
commit ee37c39a43
4 changed files with 0 additions and 165 deletions
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75
src/include/cpu/amd/amdfam10_sysconf.h
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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef AMDFAM10_SYSCONF_H
#define AMDFAM10_SYSCONF_H
#include "northbridge/amd/amdfam10/nums.h"
#include <cpu/x86/msr.h>
struct p_state_t {
unsigned int corefreq;
unsigned int power;
unsigned int transition_lat;
unsigned int busmaster_lat;
unsigned int control;
unsigned int status;
};
struct amdfam10_sysconf_t {
//ht
unsigned int hc_possible_num;
unsigned int pci1234[HC_POSSIBLE_NUM];
unsigned int hcdn[HC_POSSIBLE_NUM];
unsigned int hcid[HC_POSSIBLE_NUM]; //record ht chain type
unsigned int sbdn;
unsigned int sblk;
unsigned int nodes;
unsigned int ht_c_num; // we only can have 32 ht chain at most
// 4-->32: 4:segn, 8:bus_max, 8:bus_min, 4:linkn, 6: nodeid, 2: enable
unsigned int ht_c_conf_bus[HC_NUMS];
unsigned int io_addr_num;
unsigned int conf_io_addr[HC_NUMS];
unsigned int conf_io_addrx[HC_NUMS];
unsigned int mmio_addr_num;
unsigned int conf_mmio_addr[HC_NUMS*2]; // mem and pref mem
unsigned int conf_mmio_addrx[HC_NUMS*2];
unsigned int segbit;
unsigned int hcdn_reg[HC_NUMS]; // it will be used by get_pci1234
// quad cores all cores in one node should be the same, and p0,..p5
msr_t msr_pstate[NODE_NUMS * 5];
unsigned int needs_update_pstate_msrs;
unsigned int bsp_apicid;
int enabled_apic_ext_id;
unsigned int lift_bsp_apicid;
int apicid_offset;
void *mb; // pointer for mb related struct
};
extern struct amdfam10_sysconf_t sysconf;
void get_bus_conf(void);
void get_pci1234(void);
void get_default_pci1234(int mb_hc_possible);
extern u8 pirq_router_bus;
#endif

23
src/include/cpu/amd/model_10xxx_rev.h
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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __CPU_AMD_MODEL_10XXX_REV_H__
#define __CPU_AMD_MODEL_10XXX_REV_H__
int init_processor_name(void);
/* place holder for Family 10 revision code */
#endif /* __CPU_AMD_MODEL_10XXX_REV_H__ */

43
src/include/cpu/amd/multicore.h
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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef CPU_AMD_QUADCORE_H
#define CPU_AMD_QUADCORE_H
#include <stdint.h>
#include <device/device.h>
u32 read_nb_cfg_54(void);
struct node_core_id {
u32 nodeid;
u32 coreid;
};
// it can be used to get unitid and coreid it running only
struct node_core_id get_node_core_id(u32 nb_cfg_54);
struct node_core_id get_node_core_id_x(void);
u32 get_apicid_base(u32 ioapic_num);
void amd_sibling_init(struct device *cpu);
void wait_all_core0_started(void);
void wait_all_other_cores_started(u32 bsp_apicid);
void wait_all_aps_started(u32 bsp_apicid);
void wait_all_other_cores_stopped(uint32_t bsp_apicid);
void allow_all_aps_stop(u32 bsp_apicid);
u32 get_initial_apicid(void);
#endif /* CPU_AMD_QUADCORE_H */

24
src/include/cpu/amd/powernow.h
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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 Rudolf Marek <r.marek@assembler.cz>
* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>,
* Raptor Engineering
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef POWERNOW_H
#define POWERNOW_H
void amd_generate_powernow(u32 pcontrol_blk, u8 plen, u8 onlyBSP);
void amd_powernow_update_fadt(acpi_fadt_t *fadt);
#endif