soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774
Make sure the Skylake comment refers to the correct BWG paragraph and update the text for all. BUG=N/A TEST=build Change-Id: Id383f200e079bdb91cea2240bd7a957d723a7b89 Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38747 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
This commit is contained in:
parent
84400180fa
commit
ee38b991eb
|
@ -168,8 +168,8 @@ void pch_early_iorange_init(void)
|
|||
if (pch_check_decode_enable() == 0) {
|
||||
io_enables = lpc_enable_fixed_io_ranges(io_enables);
|
||||
/*
|
||||
* Set up LPC IO Enables PCR[DMI] + 2774h [15:0] to the same
|
||||
* value program in LPC PCI offset 82h.
|
||||
* Set LPC IO Enables PCR[DMI] + 2774h [15:0] to the same
|
||||
* value programmed in LPC PCI offset 82h.
|
||||
*/
|
||||
pcr_write16(PID_DMI, PCR_DMI_LPCIOE, io_enables);
|
||||
/*
|
||||
|
|
|
@ -140,8 +140,8 @@ void pch_early_iorange_init(void)
|
|||
if (pch_check_decode_enable() == 0) {
|
||||
io_enables = lpc_enable_fixed_io_ranges(io_enables);
|
||||
/*
|
||||
* Set up ESPI IO Enables PCR[DMI] + 2774h [15:0] to the same
|
||||
* value program in ESPI PCI offset 82h.
|
||||
* Set ESPI IO Enables PCR[DMI] + 2774h [15:0] to the same
|
||||
* value programmed in ESPI PCI offset 82h.
|
||||
*/
|
||||
pcr_write16(PID_DMI, PCR_DMI_LPCIOE, io_enables);
|
||||
/*
|
||||
|
|
|
@ -135,9 +135,9 @@ void pch_early_iorange_init(void)
|
|||
if (pch_check_decode_enable() == 0) {
|
||||
io_enables = lpc_enable_fixed_io_ranges(io_enables);
|
||||
/*
|
||||
* As per PCH BWG 2.5.16.
|
||||
* Set up LPC IO Enables PCR[DMI] + 2774h [15:0] to the same
|
||||
* value program in LPC PCI offset 82h.
|
||||
* As per PCH BWG 2.5.1.6.
|
||||
* Set LPC IO Enables PCR[DMI] + 2774h [15:0] to the same
|
||||
* value programmed in LPC PCI offset 82h.
|
||||
*/
|
||||
pcr_write16(PID_DMI, PCR_DMI_LPCIOE, io_enables);
|
||||
/*
|
||||
|
|
|
@ -165,8 +165,8 @@ void pch_early_iorange_init(void)
|
|||
if (pch_check_decode_enable() == 0) {
|
||||
io_enables = lpc_enable_fixed_io_ranges(io_enables);
|
||||
/*
|
||||
* Set up ESPI IO Enables PCR[DMI] + 2774h [15:0] to the same
|
||||
* value program in ESPI PCI offset 82h.
|
||||
* Set ESPI IO Enables PCR[DMI] + 2774h [15:0] to the same
|
||||
* value programmed in ESPI PCI offset 82h.
|
||||
*/
|
||||
pcr_write16(PID_DMI, PCR_DMI_LPCIOE, io_enables);
|
||||
/*
|
||||
|
|
Loading…
Reference in New Issue