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mb/google/skyrim: Add eSPI configuration 

BUG=b:214413613
TEST=builds

Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: If1177dda705738222ce7f6f42dceafb14d37c98c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62162
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Jon Murphy 2022-02-17 20:40:23 -07:00 committed by Felix Held
parent 4f4f32ba20
commit ee67ddc707
2 changed files with 39 additions and 0 deletions
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1
src/mainboard/google/skyrim/Kconfig
View File

@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS
select FW_CONFIG select FW_CONFIG
select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_CHROMEOS
select SOC_AMD_SABRINA select SOC_AMD_SABRINA
select SOC_AMD_COMMON_BLOCK_USE_ESPI
config CHROMEOS config CHROMEOS
select EC_GOOGLE_CHROMEEC_SWITCHES select EC_GOOGLE_CHROMEEC_SWITCHES

38
src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
View File

@ -1,5 +1,43 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip soc/amd/sabrina chip soc/amd/sabrina
# eSPI Configuration
register "common_config.espi_config" = "{
.std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X60_0X64_EN,
.generic_io_range[0] = {
.base = 0x62,
/*
* Only 0x62 and 0x66 are required. But, this is not supported by
* standard IO decodes and there are only 4 generic I/O windows
* available. Hence, open a window from 0x62-0x67.
*/
.size = 5,
},
.generic_io_range[1] = {
.base = 0x800, /* EC_HOST_CMD_REGION0 */
.size = 256, /* EC_HOST_CMD_REGION_SIZE * 2 */
},
.generic_io_range[2] = {
.base = 0x900, /* EC_LPC_ADDR_MEMMAP */
.size = 255, /* EC_MEMMAP_SIZE */
},
.generic_io_range[3] = {
.base = 0x200, /* EC_LPC_ADDR_HOST_DATA */
.size = 8, /* 0x200 - 0x207 */
},
.io_mode = ESPI_IO_MODE_QUAD,
.op_freq_mhz = ESPI_OP_FREQ_33_MHZ,
.crc_check_enable = 1,
.alert_pin = ESPI_ALERT_PIN_IN_BAND,
.periph_ch_en = 1,
.vw_ch_en = 1,
.oob_ch_en = 0,
.flash_ch_en = 0,
.vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1) | ESPI_VW_IRQ_LEVEL_HIGH(12),
}"
register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL |
GPIO_I2C2_SCL | GPIO_I2C3_SCL" GPIO_I2C2_SCL | GPIO_I2C3_SCL"