mb/google/skyrim: Add eSPI configuration
BUG=b:214413613 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: If1177dda705738222ce7f6f42dceafb14d37c98c Reviewed-on: https://review.coreboot.org/c/coreboot/+/62162 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS
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select FW_CONFIG
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select MAINBOARD_HAS_CHROMEOS
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select SOC_AMD_SABRINA
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select SOC_AMD_COMMON_BLOCK_USE_ESPI
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config CHROMEOS
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select EC_GOOGLE_CHROMEEC_SWITCHES
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@ -1,5 +1,43 @@
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# SPDX-License-Identifier: GPL-2.0-or-later
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chip soc/amd/sabrina
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# eSPI Configuration
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register "common_config.espi_config" = "{
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.std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X60_0X64_EN,
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.generic_io_range[0] = {
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.base = 0x62,
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/*
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* Only 0x62 and 0x66 are required. But, this is not supported by
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* standard IO decodes and there are only 4 generic I/O windows
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* available. Hence, open a window from 0x62-0x67.
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*/
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.size = 5,
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},
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.generic_io_range[1] = {
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.base = 0x800, /* EC_HOST_CMD_REGION0 */
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.size = 256, /* EC_HOST_CMD_REGION_SIZE * 2 */
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},
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.generic_io_range[2] = {
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.base = 0x900, /* EC_LPC_ADDR_MEMMAP */
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.size = 255, /* EC_MEMMAP_SIZE */
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},
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.generic_io_range[3] = {
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.base = 0x200, /* EC_LPC_ADDR_HOST_DATA */
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.size = 8, /* 0x200 - 0x207 */
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},
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.io_mode = ESPI_IO_MODE_QUAD,
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.op_freq_mhz = ESPI_OP_FREQ_33_MHZ,
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.crc_check_enable = 1,
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.alert_pin = ESPI_ALERT_PIN_IN_BAND,
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.periph_ch_en = 1,
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.vw_ch_en = 1,
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.oob_ch_en = 0,
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.flash_ch_en = 0,
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.vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1) | ESPI_VW_IRQ_LEVEL_HIGH(12),
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}"
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register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL |
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GPIO_I2C2_SCL | GPIO_I2C3_SCL"
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