diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 88c7c7dbeb..3366f2642c 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -165,12 +165,71 @@ chip soc/intel/skylake register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty - register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" # Touchscreen - register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" # H1 - register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" # Camera - register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" # Pen - register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # Camera - register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8" # Audio + # Touchscreen + register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" + register "i2c[0]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 180, + .scl_hcnt = 85, + .sda_hold = 36, + }, + }" + + # H1 + register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" + # Configure I2C1 for cr50 TPM. Early init is required to set up a BAR + # for TPM communication before memory is up. + register "i2c[1]" = "{ + .early_init = 1, + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 190, + .scl_hcnt = 90, + .sda_hold = 36, + }, + }" + + # Camera + register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" + register "i2c[2]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 192, + .scl_hcnt = 90, + .sda_hold = 36, + }, + }" + + # Pen + register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" + + # Camera + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + register "i2c[4]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 190, + .scl_hcnt = 90, + .sda_hold = 36, + }, + }" + + # Audio + register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8" + register "i2c[5]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 180, + .scl_hcnt = 80, + .sda_hold = 36, + }, + }" # Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM # communication before memory is up. @@ -179,12 +238,6 @@ chip soc/intel/skylake .early_init = 1, }" - # Configure I2C1 for cr50 TPM. Early init is required to set up a BAR - # for TPM communication before memory is up. - register "i2c[1]" = "{ - .early_init = 1, - }" - # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci,