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soc/intel/xeon_sp: Select CPU_INTEL_COMMON 

This is an intermediate step to have SOC_INTEL_COMMON_BLOCK_CPU select
CPU_INTEL_COMMON directly, to avoid dependency problems.

Tested with BUILD_TIMELESS=1: Without including the config file in the
coreboot.rom, both OCP Tioga Pass and Delta Lake remain identical.

Change-Id: I565e75869be730e7c2fe7114b829941bc9890e6c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45041
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-09-02 15:29:49 +02:00 committed by Patrick Georgi
parent 9d63a6b46d
commit eeb4705fff
1 changed files with 1 additions and 0 deletions
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src/soc/intel/xeon_sp/Kconfig
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@ -31,6 +31,7 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_VERSTAGE_X86_32 select ARCH_VERSTAGE_X86_32
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES select BOOT_DEVICE_SUPPORTS_WRITES
select CPU_INTEL_COMMON
select SOC_INTEL_COMMON select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_RESET select SOC_INTEL_COMMON_RESET
select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS