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mb/google/arcada: Update USB2 port6 AFE setting 

Accoriding to 574354, we need to tune each port to pass eye diagram
other than just use recommanded setting as they are base guidence only.

Bug=b:124407280
TEST=Build and boot up on arcada board.

Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Change-Id: I587695809b368edd33852c4241de097ca31e9d66
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31632
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Lijian Zhao 2019-02-26 23:57:10 -08:00 committed by Patrick Georgi
parent 374c04aaec
commit eed64473fd
1 changed files with 8 additions and 1 deletions
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9
src/mainboard/google/sarien/variants/arcada/devicetree.cb
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@ -125,7 +125,14 @@ chip soc/intel/cannonlake
register "usb2_ports[3]" = "USB2_PORT_EMPTY"
register "usb2_ports[4]" = "USB2_PORT_EMPTY"
register "usb2_ports[5]" = "USB2_PORT_LONG(OC_SKIP)" # Camera
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WWAN
register "usb2_ports[6]" = "{
.enable = 1, \
.ocpin = OC_SKIP, \
.tx_bias = USB2_BIAS_0MV, \
.tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON, \
.pre_emp_bias = USB2_BIAS_28P15MV, \
.pre_emp_bit = USB2_HALF_BIT_PRE_EMP, \
}" # WWAN
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # USH
register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth