mb/google/brya/var/crota: update DPTF setting in Crota

DPTF Policy and temperature sensor values update from thermal team.

BUG=b:237640264
TEST=USE="project_crota emerge-brya coreboot" and verify it builds
without error.

Signed-off-by: Johnny Li <johnny_li@wistron.corp-partner.google.com>
Change-Id: I45b4f80cbec0723c63ac7fc7176e13ae5a2b54c2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66365
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Johnny Li 2022-08-02 15:59:19 +08:00 committed by Felix Held
parent 82f0a68a98
commit eed8079ea0
1 changed files with 4 additions and 4 deletions

View File

@ -92,10 +92,10 @@ chip soc/intel/alderlake
## Passive Policy ## Passive Policy
register "policies.passive" = "{ register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000), [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 90, 5000),
[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 5000), [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 90, 5000),
[3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000), [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 90, 5000),
[4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 75, 5000), [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 90, 5000),
}" }"
## Critical Policy ## Critical Policy