GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/common: Add Alder Lake N eMMC device ID 

Add eMMC device ID for Alder Lake N SOC.
Reference: Alder Lake N Platform EDS Volume 1 (Doc# 645548)

Change-Id: Id35ec2d508bec8ff7d6f1c5fbfaf209d42b25c72
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61124
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
This commit is contained in:
Krishna Prasad Bhat 2022-01-16 20:05:07 +05:30 committed by Felix Held
parent 9a14fab340
commit eed82d181b
2 changed files with 2 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/include/device/pci_ids.h
View File

@ -4227,6 +4227,7 @@
#define PCI_DEVICE_ID_INTEL_SKL_EMMC 0x9d2b #define PCI_DEVICE_ID_INTEL_SKL_EMMC 0x9d2b
#define PCI_DEVICE_ID_INTEL_CMP_EMMC 0x02c4 #define PCI_DEVICE_ID_INTEL_CMP_EMMC 0x02c4
#define PCI_DEVICE_ID_INTEL_JSP_EMMC 0x4dc4 #define PCI_DEVICE_ID_INTEL_JSP_EMMC 0x4dc4
#define PCI_DEVICE_ID_INTEL_ADP_EMMC 0x54c4
/* Intel Thunderbolt device Ids */ /* Intel Thunderbolt device Ids */
#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP0 0x9a23 #define PCI_DEVICE_ID_INTEL_TGL_TBT_RP0 0x9a23

1
src/soc/intel/common/block/scs/mmc.c
View File

@ -73,6 +73,7 @@ static struct device_operations dev_ops = {
static const unsigned short pci_device_ids[] = { static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_CMP_EMMC, PCI_DEVICE_ID_INTEL_CMP_EMMC,
PCI_DEVICE_ID_INTEL_JSP_EMMC, PCI_DEVICE_ID_INTEL_JSP_EMMC,
PCI_DEVICE_ID_INTEL_ADP_EMMC,
0 0
}; };