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mb/google/dedede/var/taranza: Enable wake on USB2/3 (un)plug 

Set USB port which corresponds PORTSCN/PORTSCXUSB3 register bits for enable USB wake.
The physical USB slot is 6, USB2 port5 for Bluetooth, total USB2 port num is 7, USB3 keep 6.

BUG=b:300844110
TEST=Verify USB-A device could wake up Taranza

Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Change-Id: Ied92c4a70bc594bd189dcb942f1a445412509464
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78068
Reviewed-by: Ricky Chang <rickytlchang@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
This commit is contained in:
Sheng-Liang Pan 2023-09-22 16:41:36 +08:00 committed by Felix Held
parent d2f6b3fa9c
commit eed9c8322f
1 changed files with 14 additions and 0 deletions
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14
src/mainboard/google/dedede/variants/taranza/overridetree.cb
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@ -123,6 +123,20 @@ chip soc/intel/jasperlake
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A2
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A3
# Bitmap for Wake Enable on USB attach/detach
register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \
USB_PORT_WAKE_ENABLE(2) | \
USB_PORT_WAKE_ENABLE(3) | \
USB_PORT_WAKE_ENABLE(4) | \
USB_PORT_WAKE_ENABLE(5) | \
USB_PORT_WAKE_ENABLE(7)"
register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \
USB_PORT_WAKE_ENABLE(2) | \
USB_PORT_WAKE_ENABLE(3) | \
USB_PORT_WAKE_ENABLE(4) | \
USB_PORT_WAKE_ENABLE(5) | \
USB_PORT_WAKE_ENABLE(6)"
device domain 0 on
device pci 04.0 on
chip drivers/intel/dptf