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ipq40xx: Increase CBFS and RAMSTAGE size 

Increase CBFS and RAMSTAGE size to accommodate larger binary component.

BUG=b:77641795
TEST=Build and test on Gale.
BRANCH=none

Change-Id: I25f7121221ab2bb66dfedbc4a66e06976d88cef5
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: e4d3d2d078d0a8f705afe2b6c741118727614bf0
Original-Change-Id: I6ad16c0073a683cb66d5ae8a46b8990f3346f183
Original-Signed-off-by: Kan Yan <kyan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/1366388
Original-Reviewed-by: Zhihong Yu <zhihongyu@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35134
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kan Yan 2018-10-22 14:10:43 -07:00 committed by Patrick Georgi
parent 7b2deddbb0
commit eefb5900d0
1 changed files with 3 additions and 3 deletions
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6
src/soc/qualcomm/ipq40xx/include/soc/memlayout.ld
View File

@ -58,7 +58,7 @@ SECTIONS
DRAM_START(0x80000000)
SYMBOL(memlayout_cbmem_top, 0x87280000)
POSTRAM_CBFS_CACHE(0x87280000, 384K)
RAMSTAGE(0x872e0000, 128K)
DMA_COHERENT(0x87300000, 2M)
POSTRAM_CBFS_CACHE(0x87280000, 512K)
RAMSTAGE(0x87300000, 512K)
DMA_COHERENT(0x87400000, 2M)
}