cpu/x86: don't treat all chipsets the same regarding XIP_ROM_SIZE
Previously, the XIP_ROM_SIZE Kconfig variable is used globally on x86 platforms with the assumption that all chipsets utilize this value. For the chipsets which do not use the variable it can lead to unnecessary alignment constraints in cbfs for romstage. Therefore, allow those chipsets a path to not be burdened by not passing '-P $(XIP_ROM_SIZE)' to cbfstool when adding romstage. Change-Id: Id8692df5ecec116a72b8e5886d86648ca959c78b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14625 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -798,7 +798,12 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
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#
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# Make sure that segment for .car.data is ignored while adding romstage.
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$(CONFIG_CBFS_PREFIX)/romstage-align := 64
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$(CONFIG_CBFS_PREFIX)/romstage-options := --xip -S .car.data -P $(CONFIG_XIP_ROM_SIZE)
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$(CONFIG_CBFS_PREFIX)/romstage-options := --xip -S .car.data
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# If XIP_ROM_SIZE isn't being used don't overly constrain romstage by passing
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# -P with a default value.
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ifneq ($(CONFIG_NO_FIXED_XIP_ROM_SIZE),y)
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$(CONFIG_CBFS_PREFIX)/romstage-options += -P $(CONFIG_XIP_ROM_SIZE)
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endif
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endif
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cbfs-files-y += $(CONFIG_CBFS_PREFIX)/ramstage
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@ -69,8 +69,19 @@ config TSC_SYNC_MFENCE
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to execute an mfence instruction in order to synchronize
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rdtsc. This is true for all modern Intel CPUs.
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config NO_FIXED_XIP_ROM_SIZE
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bool
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default n
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help
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The XIP_ROM_SIZE Kconfig variable is used globally on x86
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with the assumption that all chipsets utilize this value.
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For the chipsets which do not use the variable it can lead
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to unnecessary alignment constraints in cbfs for romstage.
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Therefore, allow those chipsets a path to not be burdened.
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config XIP_ROM_SIZE
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hex
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depends on !NO_FIXED_XIP_ROM_SIZE
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default ROM_SIZE if ROMCC
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default 0x10000
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